Astera Labs, Inc.(ALAB) - 2025 Q1 - Quarterly Results

Financial Performance - Q1 2025 revenue reached $159.4 million, up 13% sequentially and 144% year-over-year[3] - GAAP gross margin for Q1 2025 was 74.9%, with GAAP net income of $31.8 million and diluted earnings per share of $0.18[4] - Non-GAAP operating income was $53.7 million, with a non-GAAP operating margin of 33.7% and diluted earnings per share of $0.33[4] - Revenue for Q1 2025 reached $159,442,000, a 13% increase from $141,096,000 in Q4 2024 and a 144% increase from $65,258,000 in Q1 2024[21] - Gross profit for Q1 2025 was $119,411,000, resulting in a gross margin of 74.9%, compared to 74.0% in Q4 2024 and 77.4% in Q1 2024[25] - Operating income for Q1 2025 was $11,285,000, a significant improvement from $144,000 in Q4 2024 and a recovery from an operating loss of $82,967,000 in Q1 2024[21] - Net income for Q1 2025 was $31,819,000, compared to a net loss of $92,995,000 in Q1 2024, with diluted earnings per share of $0.18[21][25] - Non-GAAP net income for Q1 2025 was $59,627,000, with a non-GAAP diluted EPS of $0.33, compared to $0.10 in Q1 2024[25] - Cash provided by operating activities in Q1 2025 was $10,504,000, up from $3,652,000 in Q1 2024[23] - Total stock-based compensation expense for Q1 2025 was $42,446,000, down from $97,768,000 in Q1 2024[32] - The company reported a net increase in cash and cash equivalents of $6,950,000 in Q1 2025, ending the period with $86,994,000[23] Future Outlook - The company anticipates Q2 2025 revenue between $170 million and $175 million, with a GAAP gross margin of approximately 74%[7] - The company expects a GAAP gross margin of 74.0% for Q2 2025, with a non-GAAP gross margin also projected at 74.0%[30] - GAAP EPS for Q2 2025 is projected to be between $0.10 and $0.11, while non-GAAP EPS is expected to be between $0.32 and $0.33[30] Product Development and Market Position - Strong demand for PCIe scale-up and Ethernet scale-out connectivity solutions was noted, particularly in custom ASIC platforms[2] - Astera Labs is ramping production of its PCIe Gen 6 connectivity portfolio to support next-generation AI and cloud infrastructure[7] - The introduction of a PCIe 6-ready reference design based on NVIDIA's Blackwell-based MGX platform aims to enhance AI system performance[7] - The Ultra Accelerator Link™ (UALink™) Consortium ratified the UALink 200G 1.0 Specification, positioning Astera Labs as a leader in high-bandwidth interconnect solutions[7] - The company expanded its Cloud-Scale Interop Lab to accelerate the development of PCIe 6 AI platforms, enhancing interoperability testing[7] Leadership Changes - Dr. Craig Barratt was appointed to the Board of Directors, bringing extensive experience in networking and semiconductor industries[7]