Synopsys Announces Industry's First Ultra Ethernet and UALink IP Solutions to Connect Massive AI Accelerator Clusters

Core Message - Synopsys introduces the industry's first Ultra Ethernet and UALink IP solutions to address the growing demand for high-bandwidth, low-latency interconnects in AI and HPC infrastructure [1][2] - These solutions aim to scale AI accelerator clusters, supporting up to one million endpoints and 1,024 accelerators, respectively [1][2][4] Ultra Ethernet IP Solution - Offers up to 1.6 Tbps bandwidth with ultra-low latency, enabling real-time AI workload processing [1][2] - Supports scaling out backend networks to one million endpoints with a low-risk path for designers [2] - Includes a silicon-proven 224G Ethernet PHY IP with broad interoperability demonstrated at major tradeshows [2] - Provides seamless integration for switches, AI accelerators, and smart NICs [2] - Accelerates verification and validation to ensure protocol adherence to rapidly evolving standards [2] UALink IP Solution - Enables scaling up computing fabrics to support up to 1,024 AI accelerators [1][4] - Delivers 200 Gbps per lane for efficient, high-speed data transfers optimized for AI workloads [4] - Mitigates AI hardware bottlenecks with latency-optimized controller IP and shared memory access [4] - Combines verification IP with hardware-assisted solutions for quick and reliable AI hardware validation [4] Industry Collaboration - Synopsys collaborates with industry leaders including AMD, Astera Labs, Juniper Networks, Tenstorrent, and XConn to scale the HPC and AI accelerator ecosystem [1][5] - Juniper leverages Synopsys Ethernet IP in its 800GbE-capable PTX10002-36QDD Packet Transport Router, aiming to transition to 1.6TbE [3] - AMD highlights the importance of Synopsys' IP alongside its high-performance processors for creating a robust AI ecosystem [5] - Astera Labs emphasizes the role of UALink in supporting the rapid growth and complexity of AI and HPC workloads [5] - Tenstorrent plans to use Synopsys' UALink and Ultra Ethernet IP to enable large AI accelerator clusters [5] - XConn's UALink switches combined with Synopsys' IP aim to address hyperscalers' connectivity challenges [5] Availability - Synopsys Ultra Ethernet IP solution, including MAC, PCS, PHY, and verification IP, is scheduled for release in the first half of 2025 [6] - Synopsys UALink IP solution, including controller, PHY, and verification IP, is scheduled for release in the second half of 2025 [6] Company Background - Synopsys delivers comprehensive silicon-to-systems design solutions, including EDA, silicon IP, and system verification and validation [7] - The company partners with semiconductor and systems customers across industries to maximize R&D capability and productivity [7]