Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes

Core Insights - Synopsys, in collaboration with TSMC, is enhancing EDA and IP solutions for advanced semiconductor designs, particularly focusing on AI chip design and 3D multi-die innovations [2][3] - The partnership aims to accelerate the adoption of Angstrom-scale designs through certified EDA flows on TSMC's latest processes, including A16 and N2P [2][4] Collaboration and Innovation - Synopsys and TSMC are working together to provide certified digital and analog flows that improve design productivity and optimization for advanced semiconductor processes [2][3] - The collaboration includes the development of EDA flows for TSMC's A14 process, demonstrating Synopsys' commitment to high-performance design solutions [5] Technology Advancements - Synopsys' 3DIC Compiler supports TSMC's CoWoS technology, enabling unprecedented 5.5x reticle interposer sizes, which is crucial for next-generation HPC and AI chips [7] - The integration of multi-physics analysis and signoff solutions with Ansys simulation technologies enhances power, thermal, and signal integrity analysis for advanced designs [7] IP Solutions and Market Impact - Synopsys offers a broad portfolio of silicon-proven IP solutions for TSMC's advanced processes, which are essential for achieving low power and high performance in various applications, including HPC and automotive [8][9] - The successful deployment of Synopsys IP in thousands of designs helps reduce integration risk while meeting stringent power, performance, and area targets [8] Industry Engagement - Synopsys is actively participating in industry events, such as the TSMC Tech Symposium, to showcase its innovations and strengthen partnerships within the semiconductor ecosystem [10]