Microchip Unveils First 3 nm PCIe® Gen 6 Switch to Power Modern AI Infrastructure

Core Insights - Microchip Technology has launched its next generation of Switchtec Gen 6 PCIe Switches, which are the first PCIe Gen 6 switches made using a 3 nm process, aimed at enhancing data movement and reducing latency for AI workloads and HPC applications [1][2]. Group 1: Product Features - The Switchtec Gen 6 PCIe switches provide lower power consumption and support up to 160 lanes for high-density AI system connectivity [1]. - PCIe 6.0 doubles the bandwidth of PCIe 5.0 to 64 GT/s per lane, addressing previous bandwidth bottlenecks and ensuring efficient data transfer between critical components [2]. - The switches feature 20 ports and 10 stacks, with advanced error containment, diagnostics, and support for Non-Transparent Bridging (NTB) [4]. Group 2: Technological Advancements - The introduction of Flow Control Unit (FLIT) mode and lightweight Forward Error Correction (FEC) enhances data transfer efficiency, particularly for small packets typical in AI workloads [3]. - The integrated MIPS processor allows for bifurcation options at x8 and x16, facilitating flexible configurations [4]. Group 3: Development and Support - Microchip's ChipLink diagnostic tools support the Switchtec Gen 6 PCIe Switch family, providing comprehensive monitoring and troubleshooting capabilities [5]. - An evaluation kit, PM61160-KIT, is available to assist in the design and deployment of these switches [5]. Group 4: Availability - The Switchtec Gen 6 PCIe switches are currently available for sampling to qualified customers, with further information accessible through Microchip sales representatives or authorized distributors [6].