Tower Semiconductor Announces New CPO Foundry Technology Available On Tower’s Leading Sipho and EIC Optical Platforms

Core Insights - Tower Semiconductor has expanded its 300mm wafer bonding technology to enable heterogeneous 3D-IC integration, supporting Silicon Photonics (SiPho) and SiGe BiCMOS processes, addressing the demand for compact, high-performance systems in data centers [1][2][3] Technology Development - The new wafer-scale 3D-IC technology allows for the stacking of different process technologies, integrating application-specific functions into a single high-density chip, enhancing functionality and performance [2][3] - Tower's collaboration with Cadence Design Systems has resulted in a comprehensive design flow for multi-technology stacked die, improving the design process for complex projects [4][3] Market Position - This advancement reinforces Tower Semiconductor's leadership in 3D-IC and heterogeneous integration, enabling customers to achieve higher performance and integration density for applications like Co-Packaged Optics (CPO) [3][4] - Tower Semiconductor's technology platforms cater to various growing markets, including consumer, industrial, automotive, and medical sectors, emphasizing its commitment to innovation and sustainability [6][7]