Arteris Expands Ncore Cache Coherent Interconnect IP To Accelerate Leading-Edge Electronics Designs

Core Insights - Arteris, Inc. has announced the release of Ncore cache coherent network-on-chip (NoC) IP, designed to enhance engineering productivity and accelerate time-to-market for semiconductor designs, particularly for Arm and RISC-V architectures [2][4] - Ncore offers configurability and scalability, supporting various coherent and non-coherent interfaces, which provides architectural flexibility for complex system-on-chip (SoC) designs [1][3] - The Ncore IP is ISO 26262 certified, meeting safety requirements for automotive and mission-critical applications, which underscores Arteris' commitment to delivering reliable technology [4][5] Product Features - Ncore enables low latency integration of hardware accelerators into a coherent domain, potentially saving SoC design teams over 50 years of engineering effort per project compared to traditional methods [2] - It supports multiple processor IPs, including RISC-V and Armv9 Cortex, and offers multi-protocol support for seamless integration of various IPs [3] - The architecture allows for direct connections in heterogeneous systems, ensuring adaptability across diverse applications in automotive, industrial, communications, and enterprise computing markets [5] Industry Context - The growing complexity in modern electronics, driven by the number of processing elements and functional safety requirements, presents challenges for SoC designers [5] - Ncore is positioned as a solution to these challenges, aiming to connect any processor using any protocol and topology, marking a significant milestone in the development of cache coherent interconnect IP [5]