Synopsys Accelerates Trillion Parameter HPC & AI Supercomputing Chip Designs with Industry's First PCIe 7.0 IP Solution

Core Insights - Synopsys, Inc. has launched the industry's first complete PCIe 7.0 IP solution, which includes a controller, IDE security module, PHY, and verification IP, aimed at meeting the high bandwidth and low latency requirements for AI workloads [2][18] - The PCIe 7.0 solution supports data transfers of up to 512 GB/s bidirectional in a x16 configuration, addressing data bottlenecks in AI applications [2][18] - The solution will be demonstrated at the PCI-SIG DevCon in June 2024, highlighting its significance in the evolving data center infrastructure [2][19] Industry Impact - The demand for computational capabilities in data centers is rapidly increasing, driven by large language models that require processing of trillions of parameters [2][22] - Industry leaders, including Intel and Microchip, recognize the importance of Synopsys' PCIe 7.0 IP for enhancing bandwidth and efficiency in high-performance computing and AI applications [5][11] - The PCIe 7.0 technology is expected to provide a significant performance boost for AI data center infrastructure, enabling high-bandwidth, low-latency connectivity [17][21] Technical Specifications - Synopsys' PCIe 7.0 IP solution improves interconnect power efficiency by up to 50% and doubles the interconnect bandwidth compared to previous PCIe generations [15][18] - The IDE Security Module for PCIe 7.0 ensures data confidentiality, integrity, and protection against hardware-level attacks [15][18] - The PCIe 7.0 PHY IP supports speeds of up to 128 Gb/s per lane, ensuring excellent signal integrity and seamless integration with other Synopsys solutions [15][18] Future Availability - The Synopsys PCIe 7.0 Controller with IDE Security and PHY IP is expected to be generally available in early 2025, while the Verification IP is currently available [12][18]