就在明天！是德科技 & 南京ICisC 高速芯片测试技术研讨会

Core Viewpoint - The article discusses the development trends of intelligent computing chips and edge AI chips amidst the AI boom, highlighting the challenges and solutions in testing high-speed chips and the importance of interface compatibility in consumer-side chips [1]. Group 1: Event Overview - The seminar on high-speed chip testing technology will be held on May 21, organized by Nanjing Integrated Circuit Industry Service Center (ICisC) and Keysight [1]. - The event aims to explore popular semiconductor technologies for 2025 and testing methods for high-speed chips, covering PCIe 5.0/6.0, Ethernet, MIPI, and USB technologies [1]. Group 2: Seminar Highlights - The seminar will feature expert discussions on high-speed interface testing technologies, with opportunities for attendees to ask questions [2]. - Attendees will have the chance to observe high-speed chip testing processes in the ICisC laboratory [2]. - The event encourages deep exchanges among professionals in chip design, IP, EDA, and packaging sectors [2]. Group 3: Agenda - The agenda includes a welcome speech, an introduction to ICisC platform business, discussions on key technologies and measurement of intelligent computing chips, post-silicon validation of SoC chip interfaces, challenges in consumer-side chip testing, and a technical salon [9].