Market and Landscape: The Rise of the East, AI Demand Determines the Cycle - The global semiconductor sales are expected to reach $728 billion by 2025, with a year-on-year growth of 15.4%, primarily driven by strong growth in logic devices (+29%) and memory (+17%) due to the demand from data center infrastructure and the rise of AI edge applications [3][10][7] - In the first half of 2025, semiconductor sales in mainland China are projected to be $96 billion, accounting for 28% of the regional market, continuing to lead the market [3] Concentration - The top five foundries (TSMC, Samsung, SMIC, UMC, GlobalFoundries) hold an 83% market share, with TSMC alone accounting for 48.7%, showing significant premium in advanced processes [13] - The top five equipment manufacturers (ASML, AMAT, LAM, TEL, KLA) hold an 86% market share, with high-end technology still dominated by companies from Europe, the US, and Japan [13] Manufacturing and Equipment: The Era of EUV High-NA Begins, Domestic Acceleration Verification - ASML's 0.33NA EUV has been used for 3nm, with 0.55NA (High-NA) expected to enter small-scale production in 2025 and become mainstream by 2030 [39] - Domestic 28nm DUV has passed production line verification, with a target of mass production for 14nm by 2026 [39] - The global wafer fab capital expenditure (Capex) is estimated to be around $188 billion in 2025, with mainland China contributing $35 billion (+40%) [67] Process Route: FinFET → GAA → CFET, Computational Lithography + AI Precision Leverage - Samsung has begun mass production of 3nm GAA, while TSMC is at risk of trial production for 2nm in Q4 2025 [69] - The k₁ factor has dropped below 0.25, necessitating multiple exposures (LELE/LFLE/SADP/SAQP) and ILT inverse mask technology [72] - The introduction of AI and GPU acceleration has significantly reduced the computation time for full-chip ILT calculations from weeks to days [87]
半导体及封测产业发展现状与趋势(附95页PPT)