Marvell Delivers Advanced Packaging Platform for Custom AI Accelerators

Core Insights - Marvell Technology, Inc. has introduced an innovative multi-die packaging solution that significantly reduces the total cost of ownership (TCO) for custom AI accelerator silicon, enabling designs that are 2.8 times larger than traditional single-die implementations [1][7] - The new packaging technology addresses challenges in the AI era, such as power management and supply chain complexities, allowing hyperscalers to accelerate time-to-market and enhance supply chain flexibility [2][4] Company Developments - The multi-die packaging platform is part of Marvell's comprehensive IP portfolio for custom AI compute platforms and has been qualified with a major hyperscaler, now entering production ramp [1][7] - Marvell's approach integrates advanced features such as a modular RDL interposer, which reduces design costs and increases chiplet yields by allowing individual die replacements [5][10] Industry Context - The chiplet processor market is projected to grow by 31% annually, reaching $145 billion by 2030, highlighting the importance of advanced packaging technologies in the evolution of chiplet architectures [4] - Collaboration with leading companies in the semiconductor industry, such as ASE and Amkor Technology, emphasizes the critical role of advanced packaging in enhancing performance and efficiency for AI and accelerated compute devices [9][10] Technical Innovations - The Marvell RDL interposer design allows for shorter die-to-die interconnects and supports the integration of passive devices to minimize signal noise, enhancing the overall performance of AI designs [6][5] - The platform supports the integration of HBM3 and HBM3E memory, with plans for future HBM4 designs, showcasing Marvell's commitment to advancing memory technologies in AI infrastructure [8][11]