澜起科技推出CXL 3.1内存扩展控制器

Core Viewpoint - The launch of the CXL3.1 memory expansion controller (M88MX6852) by 澜起科技 marks a significant advancement in memory architecture, aimed at enhancing bandwidth and reducing latency for next-generation data center servers [1][2]. Group 1: Product Features - The M88MX6852 chip supports CXL.mem and CXL.io protocols, providing high bandwidth and low latency memory expansion and pooling solutions [1]. - It utilizes a PCIe 6.2 physical layer interface with a maximum transmission rate of 64 GT/s (x8 channels) and features dual-channel DDR5 memory controller supporting speeds up to 8000 MT/s [1]. - The chip integrates dual RISC-V microprocessors for dynamic resource configuration and hardware-level security management, along with multiple interfaces for system integration [1]. Group 2: Market Demand and Applications - The demand for cloud computing resource pooling is increasing, making traditional memory architectures a performance bottleneck [2]. - The CXL3.1 memory expansion controller enables elastic allocation and efficient utilization of memory resources, thereby reducing total cost of ownership (TCO) [2]. - The chip is compatible with EDSFF (E3.S) and PCIe add-in card (AIC) formats, making it suitable for various deployment environments including servers and edge computing [2]. Group 3: Industry Feedback - Stephen Tai, the company president, highlighted that the chip represents a breakthrough in CXL technology, enhancing memory expansion performance and energy efficiency [2]. - Feedback from industry leaders like Samsung and AMD indicates strong support for the CXL3.1 controller, emphasizing its role in advancing memory decoupling architecture and reducing TCO in data centers [2][3].