Hua Er Jie Jian Wen·2025-12-11 09:34Core Insights - TSMC is accelerating the expansion of its advanced packaging capacity to meet the explosive growth in demand for AI chips [1][2] - The company plans to increase its CoWoS capacity to 127,000 units per month by the end of 2026, while non-TSMC players will see their capacity rise from 26,000 to 40,000 units, an increase of over 50% [1] - NVIDIA continues to dominate the market, securing over half of TSMC's CoWoS capacity with an annual order volume of 800,000 to 850,000 units [1] Capacity Expansion Plans - TSMC's CoWoS capacity is expected to reach 127,000 to 130,000 units per month by the end of 2026, significantly up from the previous estimate of 100,000 units [4][5] - This expansion aligns with Morgan Stanley's November forecast, which anticipated a capacity increase of over 20% [1][4] - The increase in capacity is aimed at matching the new 3nm front-end wafer capacity to meet the high demand for AI chips [1][5] Market Dynamics - The demand for GPUs and ASICs is surging, prompting TSMC and non-TSMC players to expand capacity [2] - NVIDIA remains the leader in large model training, while ASICs are expected to grow in importance, with companies like Broadcom and MediaTek entering the market [2] - The competitive landscape is evolving, with MediaTek securing nearly 20,000 units of ASIC capacity for 2026 [2] Technological Developments - TSMC is set to enhance its CoWoS technology by 2027 to meet the increasing demand for more logic and high-bandwidth memory (HBM) [7] - The company plans to produce CoWoS with a 9.5x mask size, integrating 12 or more HBM stacks into a single package [7] Financial Implications - The expansion plan is expected to require an additional capital expenditure of approximately $5 billion to $7 billion, potentially raising TSMC's total capital expenditure for 2026 from an estimated $43 billion to a range of $48 billion to $50 billion [6]