Synopsys(US:SNPS) Haitong Securities International·2025-05-16 09:32Investment Rating - The report does not explicitly provide an investment rating for the industry or specific companies involved in RISC-V chip verification and AI computing power [1]. Core Insights - The explosive growth in AI computing power is driving a revolutionary upgrade in chip validation paradigms, highlighting the inadequacy of traditional validation methods for the complexity of RISC-V chips [3][9]. - The open-source nature of RISC-V is seen as critical for breakthroughs in China's semiconductor industry, with modular instruction extensions and low-cost licensing models enabling customized architectures [4][10]. - The dual drive between AI and chip design presents new challenges, necessitating a shift towards "efficiency-first" design principles and forward-looking extensibility in architecture [5][11]. Summary by Sections Event Overview - On May 14, 2025, Synopsys and BlueCore Technology held a roundtable discussion focusing on RISC-V chip validation, addressing the "impossible triangle" dilemma, hardware-accelerated validation methodologies, and strategies for co-building verification tools in an open-source ecosystem [2][8]. Validation Paradigms - Traditional validation methods struggle with the complexity of RISC-V chips, exacerbated by architectural flexibility and increasing core counts, leading to an expanded validation space [3][9]. - Synopsys proposed the Shift Left strategy, moving validation to the architecture exploration phase, which combines hardware emulation with virtual prototyping platforms to significantly reduce cycle times [3][9]. Open-Source Ecosystem - BlueCore emphasized that RISC-V's modular instruction extensions and low-cost licensing model provide freedom for customized architectures, although challenges remain in server application porting and low-power validation [4][10]. - Synopsys' full-stack toolchain has streamlined development, enabling clients to boost performance by 20% and reduce power consumption by 10% [4][10]. AI and Chip Design - The conflict between compute demand and energy efficiency is pushing designs towards "efficiency-first" principles, while the mismatch between AI iteration speed and chip development cycles requires forward-looking extensibility [5][11]. - The integration of FPGA prototyping with AI and functional safety requirements highlights the depth of technological convergence needed in the industry [5][11]. Future Path - The dialogue outlines a clear path for AI-RISC-V co-evolution, transitioning validation from "tool-driven" to "AI-empowered" and moving ecosystems from "single-point breakthroughs" to "full-chain collaboration" [5][12].