存储路线图，三星最新分享

Group 1: DRAM Evolution - Samsung Electronics reviewed the evolution of DRAM units, highlighting the transition from planar n-channel MOS FETs in the 1990s to advanced structures in the 21st century due to short-channel effects and leakage currents [1][3] - The layout of DRAM unit arrays improved in the 2010s, reducing unit area from "8F2" to "6F2," achieving a 25% reduction in area while maintaining the same processing dimensions [1][3] - The next generation of DRAM, referred to as "0A" (below 10nm), is expected to shift from the "6F2" layout to a "4F2" layout, indicating a significant change in design [3][4] Group 2: 3D DRAM Development - Samsung is exploring 3D DRAM technology, which involves vertically stacking longer DRAM units to increase memory capacity [6][8] - The prototype of 3D DRAM, known as "VS-CAT," demonstrates the potential for increased density and reduced silicon area by stacking storage unit arrays above peripheral circuits [8][12] Group 3: NAND Flash Memory Evolution - NAND flash memory has reached the limits of density and miniaturization, prompting a shift from planar NAND to 3D NAND technology, which significantly increases charge storage capacity and reduces interference between adjacent units [10][12] - The number of stacked layers in 3D NAND has increased from 32 layers in the early 2010s to over 300 layers by the mid-2020s, enhancing memory density [12][14] - Challenges similar to those faced by planar NAND persist in 3D NAND, including difficulties in etching deeper holes for unit string channels and increased interference due to reduced spacing between storage holes [12][13] Group 4: Ferroelectric Film Applications - The introduction of ferroelectric films in NAND flash memory units aims to reduce programming voltage and suppress threshold voltage fluctuations, which can help mitigate interference between cells [14][16] - The use of ferroelectric films allows for multi-value storage capabilities, increasing the number of threshold voltage levels from two to eight or sixteen [14][16] Group 5: Future Technologies and Innovations - Various companies and experts shared advancements in DRAM and NAND technologies, including imec's pure metal gate technology and NEO Semiconductor's 3D X-DRAM technology [18][19] - Innovations in ferroelectric memory and resistive memory technologies were also discussed, showcasing ongoing efforts to enhance performance and reliability in semiconductor storage solutions [19][20]