是说芯语·2025-06-04 00:43Core Viewpoint - The article summarizes the EDA (Electronic Design Automation) tool expenditures mentioned in the 2024 financial reports of 15 listed SoC/MCU/ASIC chip design companies, indicating that EDA expenses are relatively low, around 1% of total R&D costs, but are crucial for chip design [1]. Group 1: EDA Expenditures - Few companies disclose EDA tool expenses in their annual reports, and the disclosed amounts are generally low compared to overall R&D expenses [1]. - EDA tools are essential in chip design, akin to physical education in school exams, where despite low scoring weight, failing to meet standards can prevent entry into prestigious institutions [1]. - Companies like 瑞芯微 reported a significant increase of 294.58% in long-term payables due to increased EDA tool purchases [1][2]. Group 2: Company-Specific Insights - 中科蓝讯 reported EDA tool payables with a year-end balance of 5,309,734.52 yuan, down from 6,163,510 yuan at the beginning of the period [2][3]. - 普冉半导体 noted a 77% increase in intangible assets attributed to new EDA and IP purchases [5]. - 炬芯科技 indicated a 217% increase in other payables, primarily due to increased EDA tool procurement [7]. - 国民技术 reported EDA tool amortization of 370,000 yuan in long-term deferred expenses [14]. Group 3: Government Support and Risks - 晶晨股份 received government subsidies for EDA innovation applications [9]. - Several companies, including 恒玄科技 and 国科微, mentioned risks associated with EDA in their reports [13][16]. - 北京君正 received multiple EDA-related subsidies, highlighting government support for the industry [16].