存算一体瓶颈，中国团队实现突破

Core Viewpoint - The rapid development of artificial intelligence (AI) presents new challenges for chip computing power, particularly the "memory wall" issue, which arises from the limitations of the von Neumann architecture widely used in processors [1][3]. Group 1: Memory Wall Problem - The von Neumann architecture simplifies hardware design by storing data and instructions in the same memory, but it limits CPU execution capabilities due to sequential instruction processing [3]. - The performance of storage has not kept pace with CPU advancements, leading to significant delays as CPUs wait for memory read/write operations, thus degrading overall system performance [3][4]. Group 2: Processing-In-Memory (PIM) Technology - PIM, or Compute-in-Memory, is an emerging non-von Neumann computing paradigm aimed at addressing the "memory wall" problem by executing computations within memory, reducing data transfer time and energy costs [5][6]. - The development of PIM technology has evolved through various stages since the 1990s, with significant contributions from both academic institutions and companies like Samsung, SK Hynix, and Micron [6][8]. Group 3: Current PIM Technologies - Mainstream PIM technologies include digital PIM (SRAM/DRAM), analog PIM (RRAM, PCM), and hybrid PIM, each with distinct advantages and challenges [8]. - Companies and research institutions have been actively developing PIM prototypes since 2017, with notable advancements in traditional storage technologies [8][9]. Group 4: Sorting Challenges in AI - Sorting is a critical and time-consuming operation in AI systems, affecting applications in natural language processing, information retrieval, and intelligent decision-making [10][11]. - The complexity of sorting operations, particularly in dynamic environments, poses significant challenges for traditional computing architectures, leading to high time and power consumption [10][11]. Group 5: Breakthrough in Sorting Hardware Architecture - A team from Peking University has achieved a breakthrough in efficient sorting hardware architecture based on PIM technology, addressing the inefficiencies of traditional architectures in handling complex nonlinear sorting tasks [13][14]. - The new architecture reportedly enhances sorting speed by over 15 times and improves area efficiency by more than 32 times, with power consumption reduced to one-tenth of traditional CPU or GPU processors [15][17]. Group 6: Implications and Future Applications - This breakthrough is expected to support a wide range of AI applications, including intelligent driving, smart cities, and edge AI devices, providing a robust foundation for next-generation AI technologies [16][17]. - The successful implementation of this sorting architecture signifies a shift from application-specific solutions to broader, general-purpose computing capabilities within PIM systems [15][16].