台积电下一代技术或延期！

Core Viewpoint - TSMC's CoPoS packaging technology mass production timeline is delayed from 2027 to 2029-2030 due to technical challenges, which may influence NVIDIA's plans for its Rubin Ultra GPU and shift focus to multi-chip module architecture [1] Group 1: TSMC's CoPoS Technology - TSMC's CoPoS (chip-on-panel-on-substrate) technology aims to enhance area utilization through larger panel sizes (e.g., 310x310mm) to meet AI GPU demands from clients like NVIDIA [1] - The delay in CoPoS mass production is attributed to immaturity in technology, particularly in managing panel and wafer discrepancies, larger area warpage control, and additional redistribution layers (RDL) [1] Group 2: Impact on AI Industry - Nomura's analysis suggests that TSMC may redirect its 2026 chip backend capital expenditures towards other technologies such as WMCM and SoIC, with CoWoS capacity allocation becoming a critical monitoring point [1] - The postponement of CoPoS could lead NVIDIA to adopt a multi-chip module architecture similar to Amazon's Trainium 2 design for its 2027 product launch [1]