半导体芯闻·2025-08-21 10:26Core Viewpoint - The emergence of CoWoP technology by Nvidia is seen as a potential disruptor to TSMC's CoWoS technology, which has been dominant in advanced packaging for AI chips. The industry is debating whether CoWoP is merely a temporary trend or a significant shift in semiconductor packaging [1][3]. Summary by Sections CoWoP vs CoWoS - CoWoP (Chip on Wafer on PCB) integrates the packaging substrate with PCB, allowing for a thinner, lighter, and higher bandwidth module design compared to CoWoS (Chip-on-Wafer-on-Substrate). This integration reduces material and manufacturing costs while accelerating production timelines [2][3]. Market Impact - The introduction of CoWoP has sparked discussions about its potential to replace CoWoS and has raised questions about the future of TSMC's CoPoS (Chip-on-Panel-on-Substrate) technology, which is designed to address CoWoS's production bottlenecks [3][4]. Advantages of CoWoP - CoWoP offers several advantages, including simplified system architecture, improved thermal management, reduced substrate costs, and potentially fewer backend testing steps. It aims to solve issues like substrate warping and enhance NVLink coverage without additional substrate layers [4][5]. Challenges and Risks - Despite its potential, CoWoP faces significant challenges in commercial viability, particularly in scaling up for high-capacity GPUs. The transition from existing technologies to CoWoP involves risks, especially given TSMC's current high yield rates with CoWoS [6][7]. Industry Sentiment - PCB manufacturers express skepticism about CoWoP's ability to replace CoWoS in the short term, citing the need for substantial advancements across the entire supply chain. They believe that existing technologies remain adequate and that the transition to CoWoP will take considerable time [7][8].