Core Insights - The article emphasizes the growing demand for computing power driven by generative AI, highlighting the challenges faced by traditional architectures and the potential of RISC-V combined with DSA as a key player in AI acceleration [1][4]. Group 1: Event Overview - The 2025 Andes RISC-V CON in Beijing will feature a roundtable forum discussing the advantages and challenges of RISC-V in AI computing acceleration, bringing together academic and industry experts [1]. - The event is scheduled for August 27, 2025, from 9:00 AM to 5:30 PM at the Lijing Huayuan Hotel in Beijing [8]. Group 2: Key Discussion Topics - The combination of RISC-V and DSA is expected to provide flexibility and scalability for AI computing, enabling customized acceleration solutions for various application scenarios [4]. - The forum will explore multi-layer optimization from Graph to Kernel, discussing the role of compiler ecosystems and RVV/RVM extensions in overcoming performance bottlenecks [4]. - There will be an in-depth analysis of RISC-V applications in low-power edge AI and high-performance data center AI, focusing on balancing power consumption, real-time performance, and overall efficiency [4]. - The future of AI architecture evolution from CNN to Transformer to LLM will be discussed, particularly how RISC-V can maintain architectural flexibility to support next-generation AI chip designs [4]. Group 3: Event Highlights - Notable keynote speeches will be delivered by industry leaders, including Andes CEO Lin Zhiming, focusing on how RISC-V can accelerate application deployment in chip design and innovations in AI and embedded systems [8]. - Partner companies such as PUFsecurity, S2C, and Siemens will showcase the latest RISC-V products and live demonstrations [9]. - The event will feature a rich technical agenda and practical demonstrations, including the performance of DeepSeek and Android on the Andes Qilai Platform, which supports both Android and Linux systems [10].
AI计算加速,RISC-V的优势与挑战何在?
半导体行业观察·2025-08-25 01:46