0.2nm将在15年内实现

Core Viewpoint - The article discusses the future development of silicon-based semiconductor technology as outlined in the "2026 Semiconductor Technology Roadmap" by the Korean Semiconductor Engineers Society, predicting advancements in semiconductor manufacturing processes over the next 15 years, with a focus on achieving below 1 nanometer wafer processes and enhancing the industry's long-term competitiveness [1][2]. Group 1: Semiconductor Technology Advancements - Samsung has recently launched the world's first 2-nanometer Gate-All-Around (GAA) chip, Exynos 2600, and plans to upgrade this technology with a third-generation 2-nanometer GAA process, SF2P+, within two years [2]. - The roadmap anticipates that by 2040, semiconductor processes will reach 0.2 nanometers, utilizing a new transistor architecture called Complementary FET (CFET) alongside a monolithic 3D chip design [2]. - Samsung aims to achieve mass production of 1-nanometer chips by 2029, which will enhance both system-on-chip (SoC) for mobile devices and memory chips, reducing DRAM process from 11 nanometers to 6 nanometers and upgrading high-bandwidth memory (HBM) from 12-layer stacking with 2TB/s bandwidth to 30-layer stacking with 128TB/s bandwidth [2]. Group 2: NAND Flash Memory and AI Chip Development - SK Hynix has developed a 321-layer stacked QLC technology in the NAND flash memory sector, with predictions of achieving 2000-layer stacking in the future [3]. - Current AI processors can reach a maximum computing power of 10 TOPS, but the roadmap forecasts that in 15 years, chips for model training will achieve 1000 TOPS, while chips for inference tasks will reach 100 TOPS [3].