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Navitas Unveils 5th Generation SiC Trench-Assisted Planar (TAP) Technology
Globenewswire· 2026-02-12 13:30
Core Viewpoint - Navitas Semiconductor has launched its 5th-generation GeneSiC technology platform, featuring a new High Voltage SiC Trench-Assisted Planar MOSFET technology that delivers an industry-leading 1200V line of MOSFETs, enhancing its position in AI data centers, grid and energy infrastructure, and industrial electrification [1][6]. Group 1: Technology Advancements - The 5th generation MOSFET platform features the most compact TAP architecture yet, combining the ruggedness of a planar gate with superior performance enabled by a trench structure, enhancing efficiency and reliability for high-voltage power electronics [2][4]. - A 35% improvement in the RDS,ON × QGD figure of merit compared to the previous generation 1200V technology significantly reduces switching losses, allowing for cooler operation and higher frequency in demanding power stages [3]. - The technology achieves a ~25% improvement in the QGD / QGS ratio, ensuring immunity against parasitic turn-on and providing robust gate drive in high-noise environments [4]. Group 2: Performance and Reliability - The 5th generation technology optimizes the RDS(ON) × EOSS characteristic and integrates a "Soft Body-Diode" technology to enhance system stability by minimizing electromagnetic interference (EMI) and ensuring smoother commutation during high-speed switching cycles [5]. - AEC-Plus grade qualification ensures long-term stability and durability for applications in AI data centers and energy infrastructure, with significant reliability benchmarks highlighted by the company [6][8]. Group 3: Future Developments - Navitas plans to announce new products within the 5th generation technology platform in the coming months, indicating ongoing innovation and product development [7].