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Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Prnewswireยท 2025-04-29 16:00
Core Insights - Synopsys and Intel Foundry have announced collaborations to enhance EDA and IP solutions for advanced semiconductor processes, specifically targeting the Intel 18A and 18A-P process nodes [2][5][6] EDA and IP Solutions - Synopsys has introduced certified AI-driven digital and analog design flows for the Intel 18A process node and production-ready EDA flows for the Intel 18A-P process node, which includes advanced technologies like RibbonFET and PowerVia [2][6] - The collaboration aims to accelerate the development of AI and high-performance computing (HPC) chip designs, providing comprehensive technologies for mutual customers [5][6] Multi-Die Design Innovation - Synopsys and Intel Foundry are working together to enable the new Embedded Multi-die Interconnect Bridge-T (EMIB-T) technology, which combines benefits from both 2.5D and 3D packaging technologies [3][9] - The EMIB-T reference flow is powered by Synopsys' unified exploration-to-signoff platform, facilitating efficient designs and high-quality results [9] Power, Performance, and Area (PPA) Optimization - Synopsys' EDA flows are optimized for power and area, leveraging Intel's PowerVia technology for enhanced thermal-aware implementations [6][10] - The collaboration has resulted in significant advancements in power, performance, and area (PPA) for designs on Intel 18A and Intel 18A-P process nodes [6][10] Ecosystem Expansion - Synopsys has joined the Intel Foundry Accelerator Design Services Alliance and the Intel Foundry Accelerator Chiplet Alliance to further support the semiconductor ecosystem [11] - This membership aims to enhance interoperability and manufacturability for multi-die chip designs on Intel 18A [11]