TSMC(US:TSM)2026-01-15 01:06Summary of Key Points from the Conference Call Industry Overview - The semiconductor industry is experiencing a unique phase characterized by a significant supercycle, with high demand for advanced logic, DRAM, and NAND products. Chipmakers are struggling to expand capacity quickly enough, and there may soon be limitations due to fab equipment supply [1][2] - Despite the booming demand, technological advancements in scaling, power consumption, and chip costs have slowed considerably, leading to a perception that Moore's Law has become a "Moore's Wall" [1][2] Innovations and Developments - The semiconductor industry has a history of overcoming skepticism, with promising innovations on the horizon for the next decade [3][4] - Memory prices are surging, making 3D NAND technology relevant again. The report discusses SK Hynix's latest V9 NAND technology and Samsung's improvements using molybdenum (Mo) [5][6] NAND Technology Insights - NAND scaling is critical due to rising demand and limited cleanroom space for capacity expansion. Memory producers are constrained to upgrading existing lines, with leading fabs utilizing a 3xx-layer 3D NAND process yielding approximately 20-30 Gb/mm² of memory, equating to over 30 TB on a single 12" wafer [8] - SK Hynix's 321-layer process offers 44% more memory per wafer compared to the previous 238-layer technology, making upgrades a clear choice for manufacturers facing cleanroom space constraints [10] Scaling Methods - Four main avenues for scaling NAND storage capacity per wafer include logical scaling, vertical scaling, lateral scaling, and architecture scaling [11][12][13] - Vertical scaling is currently the most cost-effective method, with NAND layer counts increasing rapidly [19][20] Challenges in Manufacturing - Increasing the number of layers per deck presents significant challenges, with Hynix reporting a 30% increase in overall process steps and a 20% increase in etch steps from V8 to V9, while layer counts increased by nearly 35% [28] - The complexity of manufacturing processes increases with the number of layers, and achieving high yields in production remains a challenge [27][55] Competitive Landscape - Hynix's 321L V9 product faces commercial challenges, as its density of 21 Gb/mm² is comparable to Micron's 276L G9, which achieves similar density with fewer decks, resulting in lower costs [33][34] - Samsung's upcoming 332L BiCS10 technology is expected to outperform Hynix's offerings, achieving densities of 29 Gb/mm² for TLC and over 37 Gb/mm² for QLC [34] Next-Gen Interconnects - As semiconductor nodes scale below 10 nm, traditional copper interconnects face critical bottlenecks, prompting the exploration of ruthenium (Ru) as a superior alternative [59] - Samsung's introduction of Grain Orientation Engineering through Ru Atomic Layer Deposition (ALD) has shown promising results, achieving a 46% reduction in resistance for ultra-fine interconnects [60][61] Conclusion - The semiconductor industry is at a crossroads, balancing unprecedented demand with technological challenges. Innovations in NAND technology and interconnect materials are crucial for maintaining competitive advantages and meeting future market needs.