Core Viewpoint - Morgan Stanley has raised its forecast for Google's TPU chip shipments for 2026 and 2027, expecting shipments to reach 3.7 million and 5 million units respectively, driven by TSMC's expanding CoWoS packaging capacity and strong market demand [1][3]. Group 1: Capacity Forecast Adjustments - Morgan Stanley has increased its CoWoS capacity forecasts for 2026 and 2027 by 8% and 13% respectively, reflecting TSMC's new capacity construction in the second half of 2026 and 2027 [1][3]. - TSMC's CoWoS capacity is expected to reach 115,000 wafers per month by the end of 2026, with external suppliers providing an additional 12,000 to 15,000 wafers per month [1][3]. Group 2: Demand Drivers - The increase in capacity is primarily driven by rising demand from the ASIC supply chain [1][3]. - The main shipments for 2026-2027 will come from TPU v7 (Ironwood) and v8 series (Broadcom's AX version and MediaTek's X version) [3]. Group 3: Company-Specific Insights - NVIDIA's CoWoS allocation for 2026 remains at 700,000 wafers, with slight adjustments in product mix due to HBM4 readiness issues [4]. - AMD's CoWoS forecast remains unchanged at 90,000 and 120,000 wafers for 2026 and 2027, respectively, with potential delays in the MI450 project [4]. - AWS's Trainium project has seen a slight reduction in expected shipments for 2026, now projected at 2.1 million units [5]. Group 4: Outsourcing Trends - The outsourcing ratio for packaging has increased, benefiting equipment suppliers [6][7]. - TSMC will focus on key GPU and AI ASIC projects, leaving smaller projects to packaging houses like ASE and Amkor [7]. - Equipment suppliers are expected to see a year-on-year increase in demand for CoWoS, with new capacity projected to grow by 40,000 to 50,000 wafers per month [7].
CoWoS产能支撑,摩根大通再次上调TPU预期:今明两年出货量有望达370、500万颗