报道：SK海力士正探索HBM4新封装技术，剑指英伟达顶级性能目标

Core Viewpoint - SK Hynix is developing an innovative packaging technology for next-generation high bandwidth memory (HBM4) to overcome performance bottlenecks without significantly increasing capital expenditures [1][4]. Group 1: Technology Development - SK Hynix is advancing a packaging architecture improvement plan that includes increasing DRAM chip thickness and reducing inter-layer spacing, currently in the validation stage [1][3]. - The core measures aim to enhance the stability of HBM4's overall structure and improve data transmission speed while maintaining the overall height requirement of 775 micrometers [2][3]. Group 2: Market Implications - If successfully commercialized, this technology could solidify SK Hynix's technological leadership in the HBM competitive landscape and provide more competitive memory solutions for downstream clients like NVIDIA [1][4]. - The potential advantage of this technology lies in its low capital investment requirement, which is crucial for semiconductor manufacturers seeking cost-effectiveness in high-intensity R&D competition [4]. Group 3: Challenges Ahead - Despite the promising developments, challenges remain in scaling the technology to mass production, particularly regarding technical stability and process consistency [4]. - The new packaging technology aims to maintain stable yield rates while addressing the challenges posed by reduced inter-layer spacing, such as the stability of the molding underfill (MUF) material [3].