西门子EDA HAV Tech Tour 报名中丨驱动软硬件协同，预见系统工程未来

Core Insights - The article emphasizes the importance of "Hardware-Assisted Verification" (HAV) and "Shift-Left Verification" strategies in the development of complex System on Chip (SoC) systems, highlighting their role in improving development efficiency and reducing hardware and software failure risks [1]. Group 1: HAV Technology Overview - HAV technology is essential for SoC system verification, and teams must carefully select HAV tools and methods early in the design process to enhance efficiency and mitigate risks [1]. - Siemens has launched the Veloce™ CS system, which includes three core platforms: Veloce™ Strato CS (hardware emulation platform), Veloce™ Primo CS (enterprise-level prototyping platform), and Veloce™ proFPGA CS (software prototyping platform) [3]. Group 2: Veloce™ CS System Features - Strato CS and Primo CS operate on a unified architecture, sharing the same operating system and applications, which allows for seamless switching and significantly enhances verification efficiency, achieving up to 3 times improvement and reducing total ownership costs by approximately 6 times [3]. - The Veloce proFPGA CS system features a modular design that allows users to customize configurations, ranging from a single FPGA with 80 million gates to a capacity of 14.4 billion gates using 180 FPGAs [4]. Group 3: Upcoming Events and Presentations - A series of HAV technology seminars are scheduled, including sessions on improving SoC and system design verification efficiency using the Veloce CS ecosystem, enhancing hardware prototyping methodologies with proFPGA CS, and accelerating high-performance RISC-V SoC verification [5][6]. - The seminars will also cover the role of Strato CS in supporting efficient hardware-software co-verification for Arm Neoverse CSS [6]. Group 4: Engagement and Interaction - The events will feature interactive sessions, customer case studies, and discussions on industry trends, providing opportunities for participants to engage and share insights on cutting-edge hardware-software co-verification strategies [7][9].