Intel(US:INTC) 半导体行业观察·2025-12-27 01:33Core Viewpoint - Intel is pioneering a multi-chip design consisting of 47 chips, specifically targeting artificial intelligence and high-performance computing applications with its Ponte Vecchio computing GPU, which currently holds the record for the most chips in a design. The company plans to introduce an even more advanced multi-chip package that integrates at least 16 compute units and 24 HBM5 memory stacks on eight basic chips, with a size that can expand to 12 times that of the largest AI chips on the market, surpassing TSMC's 9.5 times [1][2]. Group 1 - The proposed multi-chip package features 16 large compute units manufactured using Intel's advanced 14A and 14A-E process technologies, which include 1.4nm features and enhanced capabilities [1]. - The foundational chips utilize 18A-PT technology (1.8nm) to perform additional computations or provide substantial SRAM cache for the main compute chips, showcasing Intel's innovative design [2]. - Intel's Foveros Direct 3D technology represents the pinnacle of its packaging innovation, utilizing ultra-high-density bonding techniques to maximize bandwidth and power for the top chips [2]. Group 2 - Intel suggests using a custom HBM5 module connected via a UCIe-A based EMIB-T interface instead of standard JEDEC-compliant HBM5 stacks, aiming for higher performance and capacity [3]. - The entire package can accommodate PCIe 7.0, optical engines, incoherent structures, 224G SerDes, dedicated accelerators for security, and even LPDDR5X memory to enhance DRAM capacity [3]. - Intel has showcased two conceptual designs: a "medium scale" design with four compute units and 12 HBM memory, and an "extreme scale" design with 16 compute units and 24 HBM5 stacks, with the latter being the focus of the article [7]. Group 3 - The extreme packaging concept is expected to emerge by the end of this decade, positioning Intel to compete closely with TSMC, which also plans to launch similar products around 2027-2028 [7]. - Achieving this extreme design within a few years poses significant challenges for Intel, particularly in ensuring that components do not deform during installation and can manage heat effectively over time [7]. - The size of these processors could reach up to 10,296 square millimeters, necessitating advanced thermal management solutions [7].