玻璃基板，英特尔首次披露细节

Core Viewpoint - Intel's exhibition of the "glass core substrate" at the NEPCON Japan 2026 indicates a significant advancement towards practical application of this next-generation packaging technology, previously thought to be in the experimental phase or halted [2] Group 1: Technology and Innovation - The glass core substrate addresses physical limitations caused by increasing chip sizes, such as warping and high wiring density, which traditional organic materials struggle to manage [4] - The glass substrate has a thermal expansion coefficient (CTE) close to silicon, minimizing deformation under heat, and its smooth surface allows for finer circuit manufacturing compared to organic substrates [4] - Intel's glass substrate features a 10-2-10 stacked structure with 20 layers, designed to handle the complex signal routing required for AI chips [6] Group 2: Specifications and Performance - The glass core thickness is 800 microns (0.8 mm), ensuring mechanical strength and rigidity for large data center packages [7] - A 45μm bump pitch has been achieved, significantly enhancing the I/O density between the chip and substrate, which is difficult to realize with organic substrates [8] - The silicon chip installation area is approximately 1,716 square millimeters, providing a large and flat surface suitable for multiple large GPU chips and high bandwidth memory (HBM) [9] Group 3: Competitive Landscape - Intel's emphasis on "no SeWaRe" indicates that the company has overcome the challenges of micro-cracking and breakage during the manufacturing process, ensuring the robustness needed for mass production [9] - The integration of EMIB (Embedded Multi-die Interconnect Bridge) into the glass substrate aims to balance cost and performance, providing a competitive alternative to TSMC's next-generation multi-chip AI accelerator CoWoS [10]