Workflow
Formal Verification
icon
Search documents
The Future of dApps: Ensuring Security with Formal Verification
Digital Asset News· 2025-08-04 18:20
Security & Vulnerabilities - Automated formal verification tool is proposed to ensure DApps security and expected behavior across all scenarios [1] - Current crypto solutions face bad press due to hacks and security vulnerabilities, hindering user adoption [2] - The proposed tool aims to enhance user safety and confidence in using crypto [2] Market Opportunity - There is a potential market for security-focused crypto solutions that address user concerns about hacks and vulnerabilities [2] - The industry needs solutions that provide a sense of safety and security to encourage wider adoption of crypto [2]
DVCon U.S. 2025 Announces Stuart Sutherland Best Oral Presentation & Best Poster Winners, Record Attendance & Conference Highlights
Globenewswire· 2025-03-11 15:44
Core Insights - The 2025 Design and Verification Conference and Exhibition U.S. (DVCon U.S.) achieved record attendance, marking a successful return to in-person events since the pandemic [1][2][3] - The conference showcased advancements in AI, formal verification, and industry standards, emphasizing its role as a premier event for the design and verification community [3] - DVCon U.S. 2026 is scheduled to take place at the Hyatt Regency in Santa Clara, California, from March 2-5, 2026, indicating growth and expansion for future events [5] Attendance and Participation - DVCon U.S. 2025 attracted participants from 32 countries, representing approximately 350 companies, with 404 first-time attendees [2] - Overall attendance reached around 1,067, including representatives from 26 exhibiting companies, and the exhibit floor was sold out [2] Awards and Recognitions - The Stuart Sutherland Best Oral Presentation award was won by a team from NVIDIA for their work on "Hierarchical Formal Verification and Progress Checking of Network-on-Chip Design" [3] - Best Poster honors were awarded to Jonathan Bonsor-Matthews and Greg Law for their poster on "Time-Travel Debugging for High-Level Synthesis Code" [3] Keynote Highlights - The industry keynote addressed the transformative role of AI in chip design and verification, with insights from leaders at Synopsys and Microsoft [4] - A panel discussion highlighted the increased complexity of verifying AI chips, with experts noting they are 50% more difficult to verify due to their dynamic behaviors [4] Future Directions - The proceedings from DVCon U.S. 2025 will be publicly available in June, allowing broader access to the insights shared during the conference [6] - The conference aims to continue fostering innovation and collaboration within the design and verification community as it prepares for future events [3][5]