Workflow
Nighthawk quantum chip
icon
Search documents
From Chips to Qubits: Inside IBM’s Quantum System Two
Bloomberg Television· 2025-11-28 13:57
We've heard so much about the GPU Chip's A. I. needs, which have catapulted in video to the top of the leaderboard.But what about quantum computing. How are they different. And who's making them.Jerry Chow of IBM gave us a tour at the Thomas J. Watson Center in Yorktown, New York. So this is our IBM Quantum System two, which is the most recent one. Most recent one.It is also a infrastructure that is built with modularity and scalability in mind built for data centers. Right. So the way to think about it is ...
From Chips to Qubits: Inside IBM's Quantum System Two
Youtube· 2025-11-28 13:57
Core Insights - The article discusses the advancements in quantum computing technology, particularly focusing on IBM's latest quantum systems and their infrastructure designed for scalability and modularity [1][2][5]. Group 1: Quantum Computing Infrastructure - IBM's Quantum System Two is highlighted as the most recent quantum computing system, featuring a modular architecture built for data centers [1][2]. - The cryogenic system is essential for cooling the quantum processors, which currently include three Heron processors with 156 qubits each [3][4]. - The control electronics are located close to the quantum processors to minimize latency and ensure efficient signal manipulation [4][5]. Group 2: Quantum Chip Technology - The Nighthawk quantum chip, which has 120 qubits arranged in a square lattice, offers improved connectivity compared to previous generations [6][14]. - The chips are mounted on printed circuit boards and integrated into cryogenic infrastructure, allowing for a varying number of chips to be accommodated [7][8]. - Efforts are being made to miniaturize wiring and components to enable more chips to fit within the same cryogenic footprint [9][12]. Group 3: Testing and Characterization - IBM has a dedicated lab for testing and characterizing quantum chips, where both room temperature and cryogenic tests are conducted to ensure performance before deployment [17][18]. - The testing environment replicates the conditions under which the chips will operate, achieving temperatures as low as 15 milli Kelvin [19][20].