每经AI快讯，12月15日，紫光国微(002049.SZ)发布第八届董事会第三十四次会议决议公告，为进一步 加强前瞻性技术研究和产业链建设，提升公司科研能力、创新能力、科技成果转化能力，同意公司成立 中央研究院，主要的研究发展方向为：第一，开展面向自动驾驶、具身机器人、低空飞行器等应用的端 侧AI芯片新架构、新模型和高效算法研究；第二，开展基于二维材料器件的新型存储器和特种芯片研 究；第三，开展高性能特种传感器芯片研究。 ...

Core Viewpoint - The article highlights the significance of the 2025 Jiufengshan Forum as a premier event in the global compound semiconductor industry, focusing on innovation and technological advancements across various sectors [2][4]. Group 1: Forum Overview - The 2025 Jiufengshan Forum will take place from April 23-25 at the Wuhan Optics Valley Convention and Exhibition Center, featuring keynote speeches and 11 parallel forums covering topics from key materials to AI-enabled EDA toolchains [2][4]. - Over 100 high-quality reports have been confirmed for the forum, with early bird ticket sales ending on March 20 [4]. Group 2: Key Themes of Parallel Forums - The forum will address cutting-edge technologies such as neuromorphic computing, two-dimensional material devices, silicon photonic quantum integration, and wide bandgap semiconductors, focusing on disruptive technologies and industry development directions [5]. - A comprehensive ecosystem will be constructed, covering the entire chain from material preparation to system integration, promoting collaborative innovation within the semiconductor industry [6]. - The integration of heterogeneous technologies will unlock multiplier effects in technological innovation, combining materials, packaging, and circuit design [7]. - The forum will showcase breakthroughs in domestic technologies, including transmission electron microscopes and compound semiconductor equipment, revealing paths to overcome technical barriers [8]. - Insights into emerging demands in sectors like 5G communication, smart driving, and quantum computing will be shared, along with semiconductor technology solutions for scenarios such as electric vehicles and data centers [9]. - The event will gather leading global companies, research institutions, and investment firms to discuss key topics such as third-generation semiconductor capacity layout and testing technology standards [10].