Hello and welcome. This video will be guiding you through an overview of the AMD Versal NoC-based hard DDR memory controllers. It will explore the architecture, configuration, simulation methodology, and hardware validation approaches for integrating and using DDR memory through the programmable Versal network on chip, or NoC.This is targeted toward engineers and system architects looking to optimize memory access on Versal devices. Let's get started. We’ll begin with an introduction to the AMD Versal™ prog ...