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日本成功开发1.4nm纳米“光刻机”
是说芯语· 2025-12-16 01:35
Core Viewpoint - DNP has successfully developed a 10-nanometer line-width NIL nanoimprint technology, which can be used for logic semiconductor circuit patterning equivalent to 1.4-nanometer technology. The company plans to start mass production in 2027 and aims to increase revenue from nanoimprint-related business by 4 billion yen (approximately 180 million RMB) by the fiscal year 2030 [1][3]. Group 1 - The demand for advanced process logic semiconductors is expanding due to the continuous improvement in terminal device performance, driving the evolution of extreme ultraviolet (EUV) exposure production technology. However, EUV requires significant investment and has high energy consumption and environmental impact [3]. - DNP has been developing nanoimprint technology since 2003 to provide manufacturers with a new technical path to reduce exposure energy consumption and optimize cost structures in certain process technology steps [3][5]. - The newly launched 10-nanometer line-width NIL nanoimprint technology can replace EUV lithography in certain patterning steps, offering semiconductor manufacturers an alternative option for advanced logic processes without EUV equipment [3][5]. Group 2 - DNP has introduced self-aligned double patterning (SADP) technology to achieve a doubling of pattern density, enabling the completion of the 10-nanometer line-width nanoimprint technology. This development leverages the company's long-standing high-precision patterning capabilities in mask manufacturing [5]. - The company estimates that using nanoimprint technology can reduce energy consumption in the exposure step to about one-tenth of that of current mainstream processes [5]. - DNP has initiated communication with semiconductor manufacturers and started the evaluation of the new NIL nanoimprint technology, planning to begin mass production in 2027 after completing customer validation and establishing a production process and supply system [5]. Group 3 - DNP plans to showcase the 10-nanometer line-width NIL nanoimprint technology at SEMICON Japan 2025, scheduled for December 17-19, 2025, to enhance communication with global semiconductor manufacturers and equipment suppliers [6]. - The performance of this technology in terms of mass production yield, production cycle, and integration with existing process technologies will be a key focus for the market [6].