Core Viewpoint - TSMC is actively developing advanced packaging technology called System over Wafer (SoW), which integrates large-scale, high-speed systems on 300mm silicon wafers or similar-sized substrates, offering high computational power, fast data transmission, and reduced power consumption [1][3]. Group 1: InFO Technology Development - The origin of SoW technology lies in TSMC's InFO (Integrated Fan-Out) packaging technology, designed for mobile processors, which allows for miniaturization and thin packaging [3]. - TSMC provided CoWoS (Chip on Wafer) packaging technology for high-performance large-scale logic (FPGA, GPU) around 2020, utilizing silicon interposers for high-density connections [3]. - TSMC has also prepared and mass-produced InFO_oS (Chip on Wafer) technology, which uses InFO for high-density connections between chips, serving as a low-cost packaging solution for high-performance large-scale logic [3][5]. Group 2: InFO_SoW Application - InFO_SoW extends the RDL size of InFO_oS to 300mm silicon wafers, placing multiple silicon chips face down on the RDL, with power modules and I/O IC connectors installed on the back [5][6]. - The basic structure of InFO_SoW features a six-layer wiring design with different rules for the silicon side and the back, capable of handling approximately 7,000W of power through water cooling [6][19]. Group 3: Cerebras Systems and WSE Technology - Cerebras Systems has applied InFO_SoW technology in its deep learning accelerator, the WSE (Wafer Scale Engine), which has a surface area of 46,225 square mm [10][19]. - The main difference between InFO_SoW and WSE technology lies in how they handle silicon chips; InFO_SoW assumes small chips are placed on a wafer-sized RDL, while WSE manufactures 84 microchips on a 300mm wafer [10][11]. - Cerebras has released multiple generations of WSE, with the first generation using 16nm technology, the second generation using 7nm, and the third generation using 5nm technology, significantly increasing transistor counts [17][18]. Group 4: Performance and Future Developments - The performance of InFO_SoW technology shows a reduction in wiring width/spacing by half compared to multi-chip modules (MCM), doubling the wiring density and data transmission rate per unit length [19]. - TSMC is also developing the next generation of InFO_SoW technology, named SoW-X (eXtreme), which differs from SoW-P by distributing components across processors and memory modules [21][23].