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台积电:先进CPO技术:通过晶圆级系统集成(CoWoS)与耦合封装(COUPE)实现集成
2025-09-15 01:49
Summary of TSMC Conference Call Company and Industry - **Company**: TSMC (Taiwan Semiconductor Manufacturing Company) - **Industry**: Semiconductor and Advanced Packaging Technologies Core Points and Arguments - **Heterogeneous Chiplet Integration**: TSMC's CoWoS® (Chip on Wafer on Substrate) and COUPE (Compact Universal Photonic Engine) technologies are pivotal for integrating heterogeneous chiplets, enhancing performance in high-performance computing (HPC) and artificial intelligence (AI) applications [4][34] - **Performance Boost Technologies**: TSMC's advancements include over 150 billion logic transistors enabled by 3DFabric® technologies, showcasing significant improvements in transistor density and performance [5][34] - **CoWoS® Platform**: This platform is versatile for 2.5D packaging technology, allowing for efficient integration of chiplets, which is crucial for scaling AI compute capabilities [7][34] - **Optical Engine Development**: COUPE integrates advanced logic on photonic integrated circuits (PIC), providing a compact and efficient optical engine with high power efficiency and performance [15][34] - **Bandwidth Growth**: TSMC's roadmap indicates that bandwidth is expected to double every generation, which is essential for supporting AI computing advancements [29][34] Additional Important Content - **Power Efficiency and Latency**: The transition from copper wire to co-packaged optics (CPO) offers over 10 times the power benefit, significantly reducing latency in data transmission [24][34] - **Optical Performance**: COUPE's optical performance characterization shows a net zero insertion loss (IL) compared to PIC wafers, indicating high efficiency in optical data transmission [21][34] - **Supply Chain Collaboration**: Emphasized the need for innovation and collaboration within the supply chain to meet the next-generation silicon photonics CPO bandwidth requirements [34]