浙江晶盛机电股份有限公司（以下简称"晶盛机电"）于2025年6月28日发布公告，宣布对部分募投项目 进行调整。公司决定终止"年产80台套半导体材料抛光及减薄设备生产制造项目"，并将剩余募集资金继 续存放于募集资金专户进行管理。同时，公司还将"12英寸集成电路大硅片设备测试实验线项目"的预计 可使用状态日期从2025年6月30日延期至2027年6月30日。 项目调整背景 晶盛机电在公告中指出，此次调整是基于行业发展态势以及公司业务发展的实际情况做出的审慎决策。 在半导体行业快速发展的背景下，国产设备需求激增。为了快速响应市场需求，公司改变了原有的发展 策略，直接从供应市场采购相关零部件，并通过提升自动化和智能化水平，实施精细化生产管理，实现 了产能的快速提升。这一策略转变使得原计划用于购置进口设备的募集资金出现大幅节余。 此外，公司全资子公司晶鸿精密已发展成为具备核心制造能力的半导体核心零部件供应商，能够满足公 司抛光减薄设备的核心零部件需求。为了避免重复建设，提高募集资金的使用效率，公司决定终止"年 产80台套半导体材料抛光及减薄设备生产制造项目"。 剩余募集资金安排 4、助力国产替代：半导体硅片生产和加工设 ...

Core Viewpoint - The company Jing Sheng Mechanical and Electrical (SZ300316) has announced significant changes to its investment projects in the semiconductor sector, including the termination of a semiconductor equipment project and a two-year delay for the 12-inch silicon wafer project. Group 1: Project Adjustments - The semiconductor equipment project, originally planned with an investment of 500 million yuan, has been terminated due to long procurement cycles for imported equipment, which did not meet the company's market response needs [6][5] - The remaining funds from the terminated project will continue to be managed in a dedicated account as per legal requirements [6][4] Group 2: Financial Overview - In 2022, the company raised 1.42 billion yuan through a private placement, allocating funds to three projects: the 12-inch silicon wafer project, the semiconductor equipment project, and working capital [2][4] - The semiconductor equipment project was expected to generate an annual sales revenue of approximately 623 million yuan and an average annual profit of about 165 million yuan upon completion [5] Group 3: 12-Inch Silicon Wafer Project - The 12-inch silicon wafer project has been postponed by two years, with a new expected completion date set for June 2027 [10][11] - The project aims to establish a comprehensive experimental line for various processes, including crystal growth, cutting, grinding, polishing, cleaning, and testing [8][10] - The company continues to affirm the necessity and feasibility of the 12-inch silicon wafer project despite the delay [11]