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SNPS' AI-Based EDA Tools Gain Traction: Is it the Next Growth Catalyst?
ZACKS· 2025-10-15 15:41
Key Takeaways Synopsys' AI-based EDA tools are driving strong customer adoption and productivity gains.Acquisitions of ANSYS and Intrinsic ID expand SNPS' verification and security IP portfolio.SNPS shares are down 1.5% YTD, with fiscal 2025 earnings estimates revised downward.Synopsys’ (SNPS) AI-driven electronic design automation (EDA) tools like Synopsys.ai, Fusion Compiler, PrimeTime, IC Validator, and StarRC are being rapidly adopted as customers are experiencing massive productivity gains from their i ...
开源芯片项目重生:Tiny Tapeout回来了
半导体行业观察· 2025-08-28 01:14
Core Viewpoint - The article discusses the launch of LibreLane, a successor to OpenLane, designed for open-source chip design, emphasizing its enhanced flexibility and usability in ASIC processes [3][4]. Group 1: LibreLane Overview - LibreLane is a complete redesign of OpenLane, allowing for customizable and distributable ASIC processes using a Python-based infrastructure [3]. - The default Classic flow in LibreLane closely replicates OpenLane, supporting the same configuration files while enabling users to create fully custom high-level data flows [3][4]. Group 2: Development and Goals - The development of LibreLane was initiated by a team from the now-defunct eFabless company, aiming to maintain OpenLane's configuration files while providing greater flexibility and consistency [4]. - The core philosophy of LibreLane is to clearly represent the current state of design, storing various file paths and metrics in immutable objects for traceability [4][5]. Group 3: EDA Task Modeling - EDA tasks are modeled as functions that receive a state and output another state, allowing for high repeatability and parallel exploration of configurations [5]. - Processes in LibreLane can be simple sequential flows or fully customized functions, facilitating easier command-line control and execution [5][6]. Group 4: Configuration and Integration - The Config module in LibreLane allows users to configure processes using Tcl, JSON, or YAML files, addressing previous pain points in input validation and type checking [6]. - LibreLane supports integration with other tools, enhancing performance in chip design by combining with Synopsys Design Compiler and PrimeTime tools [6]. Group 5: Adoption and Future Prospects - Tiny Tapeout utilizes LibreLane for its custom processes, and ChipFoundry has agreed to adopt LibreLane as its primary process, continuing the legacy of OpenLane in commercializing open-source EDA technology [7]. - The first version of LibreLane, 2.4.0, is available for macOS and Linux, with installation guides provided for users [7].