Core Insights - The research team from Peking University has developed a novel multi-physical domain fusion computing system that enhances Fourier transform capabilities, achieving nearly a fourfold increase in computational power, which opens new possibilities in fields like embodied intelligence and communication systems [1][2] Group 1: System Performance - The new system integrates two distinct types of memristors, achieving remarkable parallel computing efficiency [2] - In brain-computer interface experiments, the system demonstrated low latency and high accuracy in EEG typing, with a single classification accuracy of 99.2% [2] - The processing throughput of the system increased from approximately 130 billion operations per second to 504.3 billion operations per second, reaching 96.98 times the performance of existing dedicated fast Fourier transform hardware [2] Group 2: Significance and Future Implications - This achievement signifies a shift from "algorithm-driven design" to "physics principle-driven" approaches, transforming mathematical operations into a more efficient process akin to natural evolution [2] - The new computing framework is expected to overcome the challenges of operator spectrum expansion for post-Moore devices, enabling support for multiple computing methods and laying a solid foundation for future advancements in edge intelligence, brain-like computing, and optoelectronic integration systems [2]

Core Viewpoint - A research team from Peking University has achieved a breakthrough in multi-physical domain fusion computing architecture, enhancing computing power by nearly four times through a novel implementation of Fourier transform using post-Moore new devices [1][5]. Group 1: Breakthrough Details - The research focuses on expanding the operator spectrum of post-Moore new devices, addressing the challenges of low-latency and low-power signal processing and computing needs in various advanced fields [1][5]. - The new architecture achieves a Fourier transform precision of 99.2%, with a throughput rate of up to 504.3 GS/s, representing a nearly fourfold improvement over the fastest silicon-based chips and a 96.98-fold increase in energy efficiency [5][6]. Group 2: Technical Innovations - The team creatively integrated volatile vanadium oxide devices with non-volatile tantalum/hafnium oxide devices to create a hardware system capable of supporting diverse computing methods, particularly for Fourier transform [5][6]. - This new computing framework allows for simultaneous support of multiple computing methods, addressing the operator spectrum expansion challenge for post-Moore new devices [6]. Group 3: Future Applications - The advancements are expected to enhance real-time processing capabilities for high-concurrency and multi-modal signals in applications such as embodied intelligence and brain-computer interfaces, potentially alleviating the need for multiple invasive surgeries for hardware replacements [6]. - Experts anticipate accelerated applications of these new devices in cutting-edge fields such as artificial intelligence foundational models, autonomous driving, communication systems, and signal processing, contributing to high-quality economic development [6].

Core Insights - A research team from Peking University has developed a new computing architecture that achieves heterogeneous integration of post-Moore devices with multi-physical domain Fourier transform, resulting in nearly a fourfold increase in computing power [1] - The new architecture addresses the limitations of traditional silicon-based devices, which face challenges in miniaturization, power consumption, and storage [1] - The technology demonstrates a Fourier transform accuracy of 99.2%, with throughput nearly four times faster than the fastest silicon chips and energy efficiency improved by 96.98% [1] Industry Implications - The application of this breakthrough is expected to meet the low-latency and low-power signal processing and computing needs in various cutting-edge fields, positioning China to surpass in the next generation of computing architecture [2]