Core Insights - The company emphasizes the importance of effective computing power, which refers to the actual performance achieved when running the VLA large model, highlighting its higher utilization and lower power consumption compared to traditional GPUs [1][2] - The Mach 100 chip is identified as the first step in the company's strategy to enter a phase of "self-developed algorithms + self-developed computing power" by 2025 [1] Group 1 - The Mach 100 dual-chip configuration in the new L9 model achieves a total computing power of 2560 TOPS [2] - The effective computing power of a single Mach 100 chip is three times that of NVIDIA's Thor U, while the dual Mach 100 chips in the L9 provide an effective computing power of five to six times that of Thor U [2]

Core Viewpoint - The article discusses the advancements in chip technology, specifically the Maher 100 dual-chip system used in the new L9 model, highlighting its superior effective computing power compared to Nvidia's Thor U chip. Group 1: Chip Performance - The Maher 100 chip has a total computing power of 2560 TOPS, with each chip providing an effective computing power of 1280 TOPS, which is three times that of Nvidia's Thor U chip [1] - The effective computing power is defined as the actual performance achieved when running VLA large models, emphasizing the high utilization and low power consumption of the data flow architecture [1] - The new L9 model's dual Maher 100 chips provide an effective computing power that is 5-6 times greater than that of Thor U [1] Group 2: Industry Trends - The company anticipates that by 2025, the industry will enter an era of integrated self-developed algorithms and computing power, with the Maher 100 being the first step in this direction [1] - The article references a July 2025 report indicating that Nvidia's originally advertised 700 TOPS for the Thor chip is realistically closer to 500 TOPS after adjustments [1][2] Group 3: Precision and Performance - Higher TOPS leads to increased model throughput, which reduces inference latency and speeds up response times [2] - Fast response times require the use of low-precision inference models, which demand significant engineering capabilities [2] - The current VLA model from the company uses a mixed precision of INT8 and FP8 for inference, allowing the Thor U chip to achieve 700 TOPS [2][3] Group 4: Chip Specifications - The Thor platform supports various precision formats, with the following TOPS values: 700 TOPS for Thor U and 1000 TOPS for Thor X at FP8 precision, and 1400 TOPS for Thor U at FP4 precision [4][6] - The company plans to optimize towards FP4 precision in the future to achieve 1400 TOPS with the VLA model [6]