Core Insights - Nvidia's CEO Jensen Huang predicts that demand for AI chips will reach at least $1 trillion by 2027, doubling last year's forecast, indicating a significant shift in the chip industry towards interconnectivity as the bottleneck for AI computing power transitions from processing to connectivity [1][9] - The establishment of organizations like XPO MSA and Open CPX MSA at the OFC 2026 conference highlights the industry's consensus on the necessity of optical interconnects for AI data centers, with Arista leading the development of new liquid-cooled pluggable optical modules capable of 12.8 Tbps [1][2] Interconnect Bottleneck Shift - Huang's "Huang's Law" suggests that while processing power can continue to improve through advancements in manufacturing and 3D packaging, the I/O rates between chips are lagging, creating an "I/O wall" that limits the expansion of AI clusters [1] - Traditional copper cabling is nearing its physical limits in handling frequencies of 800G and above, restricting effective transmission distances to under 1 meter for 400G SerDes, which hampers the scalability of AI clusters across cabinets [1] Industry Index and ETF - The Shanghai Stock Exchange's Sci-Tech Innovation Board Chip Index (000685) is designed to serve as a benchmark for the entire "computing power + interconnect" industry chain, including semiconductor equipment, wafer manufacturing, chip design, and PCB materials [2][3] - The index includes up to 50 leading companies from the semiconductor industry, ensuring comprehensive coverage of key segments related to the interconnect revolution [3] ETF Performance and Structure - The Guotai Sci-Tech Chip ETF (589100) closely tracks the Sci-Tech Innovation Board Chip Index, providing investors with a standardized tool to replicate index returns [4] - As of March 16, 2026, the ETF has demonstrated a tracking error of only 0.007%, indicating high precision in mirroring the index's performance [5] - The ETF's holdings are well-aligned with the index, balancing heavy and light asset segments to match the comprehensive coverage of the industry chain [6] Investment Value of Interconnect Revolution - The rise of the interconnect revolution signifies a deeper investment logic in the chip sector, emphasizing the importance of interconnect infrastructure that supports computing clusters, rather than solely focusing on the chips themselves [8] - The demand for interconnect technology is expected to grow steadily, driven by Nvidia's forecast of $1 trillion in AI chip demand, which will also boost the demand for related interconnect devices and materials [8] - Domestic companies in the optical chip and high-speed PCB sectors are positioned to benefit from low domestic production rates and external capacity shortages, as evidenced by significant revenue growth in companies like Solstice [8]

Group 1 - The article discusses the importance of interconnectivity in the information age, focusing on the internal interconnect structures within semiconductor chips [2] - It introduces various interconnect elements such as wires, vias, local interconnects, and contact points, explaining their roles and construction methods [4][8] - The manufacturing process of chips is divided into two main stages: front-end process (FEoL) for creating transistors and back-end process (BEoL) for building interconnect layers [6][12] Group 2 - A typical silicon chip can contain up to five different interconnect elements, including metal lines, vias, local interconnects, contact points, and through-silicon vias (TSVs) [4][8] - Metal lines are primarily used for signal transmission, with advanced nodes allowing for multiple layers of metal interconnects [7][22] - TSVs are crucial for connecting signals from the front of the chip to the back, especially in stacked chip configurations [17][41] Group 3 - The article highlights the transition from aluminum to copper as the primary material for interconnects due to copper's superior conductivity [22][25] - It describes the dual-damascene process used for copper interconnects, which involves etching trenches in dielectric materials and filling them with copper [26] - Other metals such as tungsten, nickel, and emerging materials like cobalt are also discussed for their roles in interconnect applications [30] Group 4 - Dielectric materials are essential for maintaining isolation between metal lines, with silicon dioxide (SiO₂) being the most commonly used [31] - The article emphasizes the development of low-k dielectric materials to reduce capacitive effects in densely packed circuits [33] - High-k materials like hafnium oxide (HfO₂) are explored for their benefits in gate oxide applications, providing better performance without thinning the layer [38][40] Group 5 - The interconnect system within chips is evolving from simple point-to-point connections to more complex structures like buses and networks on chip (NoC) [50][75] - Buses allow for multiple signal lines to transmit data, while NoC mimics external network structures to improve efficiency in large-scale systems [53][75] - The article discusses various addressing methods in NoC, including unicast, multicast, and broadcast, to enhance data transmission efficiency [78]