证 券 研 究 报 告 Lam Research（LRCX）FY26Q2 业绩点评及业绩说明会纪要 CY25Q4 营收创新高，2026 年 WFE 预期上修 至 1350 亿美元 ❖ 事项： 2026 年 1 月 29 日 Lam Research 发布 FY26Q2 报告，并召开业绩说明会。公 司财务季度 FY26Q2 截至 2025 年 12 月 28 日，即自然季度 CY2025Q4。 CY25Q4，公司实现营收 53.4 亿美元，环比增长 0.40%，同比增长 22.14%； Non-GAAP 毛利率 49.7%，环比下滑 0.9pct，同比增长 2.2pct。2025 年全年， 公司营收达 206 亿美元，同比增长 27%，Non-GAAP 毛利率 49.9%。 ❖ 评论： 1. 业绩总览：CY25Q4，公司实现营收53.4亿美元（QoQ+0.40%，YoY+22.14%）， 连续 10 个季度增长，高于业绩指引中值（52±3 亿美元），创季度纪录；Non- GAAP 毛利率 49.7%（QoQ-0.9pct，YoY+2.2pct），超出指引区间上限。 2025 年全年，公司营收达 206 亿美元（ ...

Core Viewpoint - The company,拓荆科技, is focused on high-end semiconductor equipment, particularly in the development and industrial application of thin film deposition equipment, which has seen significant demand in the semiconductor manufacturing sector [1][4]. Group 1: Company Performance and Product Development - The company held a performance briefing on December 4, 2025, discussing its operational results and financial metrics for Q3 2025 [1]. - The company has established industrial bases in Shenyang and Shanghai, with a production capacity exceeding 700 sets per year, and is expanding its capacity with a new factory in Shenyang [1]. - The thin film deposition product series, including PECVD, ALD, SACVD, HDPCVD, and Flowable CVD, has achieved industrial application in the storage chip manufacturing sector, with a full order book indicating strong future demand [1][4]. Group 2: Technological Advancements and Market Trends - The company is continuously expanding its thin film deposition product series and increasing production scale, with new equipment platforms and advanced processes entering mass production [2]. - The semiconductor industry is transitioning into a post-Moore era, with rapid technological iterations and the emergence of new structures and materials, driving demand for advanced semiconductor equipment [3]. - The rise in storage prices reflects strong demand in the storage chip market, which may lead to increased production capacity among manufacturers, further driving the need for advanced thin film equipment [4]. Group 3: Future Outlook - The company plans to maintain its core competitiveness through high-intensity R&D investments, focusing on thin film deposition and three-dimensional integration equipment, while expanding into new products and processes required for advanced manufacturing [3]. - The ongoing complexity in storage chip processes and structures is expected to significantly boost the demand for thin film equipment, as manufacturers seek to enhance performance with advanced materials [4].

Group 1 - The article discusses the importance of interconnectivity in the information age, focusing on the internal interconnect structures within semiconductor chips [2] - It introduces various interconnect elements such as wires, vias, local interconnects, and contact points, explaining their roles and construction methods [4][8] - The manufacturing process of chips is divided into two main stages: front-end process (FEoL) for creating transistors and back-end process (BEoL) for building interconnect layers [6][12] Group 2 - A typical silicon chip can contain up to five different interconnect elements, including metal lines, vias, local interconnects, contact points, and through-silicon vias (TSVs) [4][8] - Metal lines are primarily used for signal transmission, with advanced nodes allowing for multiple layers of metal interconnects [7][22] - TSVs are crucial for connecting signals from the front of the chip to the back, especially in stacked chip configurations [17][41] Group 3 - The article highlights the transition from aluminum to copper as the primary material for interconnects due to copper's superior conductivity [22][25] - It describes the dual-damascene process used for copper interconnects, which involves etching trenches in dielectric materials and filling them with copper [26] - Other metals such as tungsten, nickel, and emerging materials like cobalt are also discussed for their roles in interconnect applications [30] Group 4 - Dielectric materials are essential for maintaining isolation between metal lines, with silicon dioxide (SiO₂) being the most commonly used [31] - The article emphasizes the development of low-k dielectric materials to reduce capacitive effects in densely packed circuits [33] - High-k materials like hafnium oxide (HfO₂) are explored for their benefits in gate oxide applications, providing better performance without thinning the layer [38][40] Group 5 - The interconnect system within chips is evolving from simple point-to-point connections to more complex structures like buses and networks on chip (NoC) [50][75] - Buses allow for multiple signal lines to transmit data, while NoC mimics external network structures to improve efficiency in large-scale systems [53][75] - The article discusses various addressing methods in NoC, including unicast, multicast, and broadcast, to enhance data transmission efficiency [78]