Core Points - Hungarian author László Krasznahorkai won the 2025 Nobel Prize in Literature for his "captivating and visionary works," with the committee highlighting the power of art in the face of apocalyptic fears [1] - Krasznahorkai is known for his postmodern novels and themes of dystopia and melancholy, profoundly influencing European literature [1] - His debut work "Satan's Tango" published in 1985 gained him significant acclaim and was adapted into a 7-hour epic film in 1994, becoming a classic [1] - He has received several prestigious awards, including the International Booker Prize in 2015 [1] Cultural Interest - Krasznahorkai has a deep interest in Chinese culture, having visited China in 1991 as a journalist, which sparked his fascination [2] - He views China as a "living museum of humanity" and has adopted Chinese customs, such as using chopsticks and enjoying Peking opera [2] - His admiration for ancient Chinese literature is evident, particularly his love for Li Bai, which he expressed in interviews [2] - Krasznahorkai has authored two books on Chinese and Eastern culture, expressing a desire for his works to be published in Chinese as a dialogue with Chinese civilization [2]

Core Insights - The fifth RISC-V China Summit will be held from July 16 to 19, 2025, in Shanghai, featuring a main forum, nine vertical sub-forums, five workshops, and a 4,500 square meter technology exhibition area, attracting hundreds of companies, research institutions, and open-source technology communities [1] - The presentation by the market director of Hanjian Software highlighted the challenges and innovations in verifying high-performance RISC-V multi-core processors, laying a solid foundation for the proliferation and development of RISC-V processors [3] Development Stages of Xiangshan Processors - The Xiangshan processor series has undergone three significant development phases: - Yanqi Lake (First Generation): Focused on architecture exploration and foundational technology, successfully implementing out-of-order execution architecture [3] - Nanhu (Second Generation): Achieved a performance leap, benchmarking against ARM Cortex-A76, recognized as a high-performance RISC-V processor core [3] - Kunming Lake (Third Generation): Targets data centers and high-performance computing, benchmarking against ARM Neoverse N2, supporting 64-core large-scale high-performance SoC system architecture [3] Key Technologies in Kunming Lake - Multi-core scalability: Architecture supports expansion from 64 to 256 cores to meet future technological demands [4] - High-speed interconnect bus: Utilizes new high-bandwidth, low-latency NoC technology for efficient data exchange [4] - Strong consistency memory system: Introduces large-scale multi-level cache and directory-based cache coherence protocols to ensure system stability [4] Challenges in Multi-core CPU Verification - The verification process faces three key challenges: - Large scale: Multi-core systems involve complex buses, multi-level caches, and peripheral interfaces, requiring FPGA resources far exceeding traditional platforms [4] - High performance requirements: Aiming for a target operating speed of 10 MHz on FPGA to support OS operation and hardware-software co-verification [4] - Debugging difficulties: Ensuring cache coherence, bus integrity, and scheduling optimization poses significant debugging challenges, with deep-rooted bugs in cross-core interactions being hard to locate [4] Verification Methodology - A systematic four-step verification methodology was proposed: - Design porting and adaptation: Automating the adaptation from ASIC to FPGA, including clock tree, storage model, and interface IP conversion [5] - Compilation and resource optimization: Balancing resource usage and efficient compilation in large-scale designs [6] - Progressive bring-up strategy: Gradually expanding from single-core to multi-core systems to reduce debugging complexity [6] - Hardware-software co-debugging technology: Utilizing hardware emulation and backdoor loading techniques for rapid fault localization and kernel loading speed breakthroughs [6] Future Directions - The Xiangshan team aims to deepen verification efficiency, explore larger-scale device cascading, and encourage EDA vendors to develop more features supporting multi-core system verification, such as low-power verification and dynamic power analysis [6][7] - The development of Xiangshan processors signifies significant progress in China's high-performance RISC-V processor field, providing replicable and scalable standardized verification methods for the industry [7]