Core Viewpoint - Xiaomi is advancing its chip development with the upcoming launch of the "玄戒O1" chip, which will utilize second-generation 3nm process technology, marking a significant step in its self-developed chip journey [4][22]. Group 1: Chip Development History - Xiaomi began its chip development journey with the "澎湃S1" in 2014 and transitioned to various self-developed "小芯片" until 2017 [1]. - In 2021, Xiaomi re-initiated the development of a SoC "大芯片" [4]. Group 2: Industry Reactions - The announcement of the "玄戒O1" has sparked widespread discussion and analysis across social media platforms, with various opinions on its performance and pricing emerging [6]. - Some skepticism exists regarding the authenticity of the chip's self-developed status, particularly concerning its architecture and components [9][12]. Group 3: Architecture and Self-Development Debate - Critics argue that the use of ARM architecture in the "玄戒O1" undermines its classification as a self-developed chip [9]. - The article counters that many successful chip manufacturers, including MediaTek and Unisoc, also utilize public ARM architectures, suggesting that using such architectures does not negate self-development claims [11][12]. Group 4: Advanced Process Technology - The "玄戒O1" will employ advanced 3nm process technology, which has raised questions about why Xiaomi can access this technology while others cannot [22][25]. - Current U.S. regulations do impose restrictions on chip manufacturing, but they are conditional and do not outright ban the use of advanced processes for certain chip types [26][28]. Group 5: Investment and R&D Costs - Xiaomi's total investment in chip development is reported to be 135 billion yuan, which raises questions when compared to OPPO's previous 500 billion yuan investment that did not yield similar results [33][35]. - The article highlights that the cost of developing advanced chips can vary significantly, and the reported R&D costs of other companies, such as MediaTek, suggest that Xiaomi's investment may be sufficient for successful chip development [37][39].