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CXL方案优化AI存储架构-头部厂商有望加速应用
2026-03-19 02:39
Summary of CXL Technology and Market Insights Industry Overview - The discussion centers around the CXL (Compute Express Link) technology and its application in optimizing AI storage architectures, particularly for CPU and GPU resource management [1][2][3]. Key Points and Arguments - **CXL Memory Pooling**: CXL enables unified scheduling of CPU/GPU resources, alleviating memory capacity and bandwidth bottlenecks in AI computing [1][2]. - **Cost Efficiency**: A system using 16 x 128GB DDR and 16 x 128GB CXL configuration has a lower total cost compared to a traditional setup with 16 x 256GB memory [1][4]. - **Market Penetration Forecast**: By 2030, it is expected that 13% of servers will utilize CXL functionality, and HBM (High Bandwidth Memory) will account for 15% of server DRAM share [1][8]. - **Innovative Solutions**: CXL technology is being utilized to optimize KV cache storage, which can significantly reduce the cost per token in AI inference processes [3]. - **Direct GPU Access**: CXL allows GPUs to directly access pooled memory resources, enhancing efficiency and addressing memory constraints in AI workloads [2]. Important Developments - **NVIDIA's Initiatives**: NVIDIA has acquired Fabric and introduced the Vera CPU, which supports CXL, facilitating the deployment of CXL memory solutions in AI data centers [6]. - **Domestic Hardware Progress**: Companies like Alibaba Cloud and Inspur are launching CXL-related hardware, such as the PolarDB database server and memory expansion solutions, indicating a growing adoption of CXL technology [7]. - **Leading Products**: - **澜起科技 (Lianqi Technology)**: Launched the first CXL 3.1 MXC chip, with a projected gross margin exceeding 62% in 2025 [1][9]. - **聚辰股份 (Jucheng Technology)**: Their VPD chip is entering the design validation phase, crucial for enterprise SSDs and CXL memory expansion modules [10][11]. - **江波龙 (Jiangbolong)**: Introduced the Force CXL 2.0 memory expansion module, expecting revenues of 17.5 billion in 2024 [1][12]. Additional Insights - **CXL Ecosystem Development**: The CXL ecosystem is supported by a wide range of participants, including major storage and chip manufacturers, which is crucial for accelerating the technology's application [5]. - **Future Market Potential**: The overall industry is expected to mature, creating growth opportunities as CXL technology becomes more integrated into server configurations [8].
澜起科技Q3营收增长57.22% DDR5第四子代RCD芯片规模出货
Xin Lang Cai Jing· 2025-10-30 12:37
Core Insights - Company reported significant revenue and profit growth in Q3 2025, with operating income reaching 1.424 billion yuan, a year-on-year increase of 57.22% [1] - The company launched multiple new products, including the CXL 3.1 memory expansion controller chip, aimed at enhancing data center performance [2] - The company is benefiting from the rising demand for DDR5 memory interface chips, driven by trends in the AI industry and the growth of domestic DRAM manufacturers [3] Financial Performance - In Q3 2025, the company achieved a net profit of 473 million yuan, up 22.94% year-on-year, and a net profit of 811 million yuan after excluding share-based payment expenses, marking a 105.78% increase [1] - For the first three quarters of the year, the company reported total revenue of 4.058 billion yuan, a 57.83% increase, and a net profit of 1.632 billion yuan, up 66.89% [1] Product Development - The company’s DDR5 memory interface chip sales saw a significant increase, with the third generation RCD chip sales surpassing the second generation for the first time [1] - The CXL 3.1 MXC chip supports CXL.mem and CXL.io protocols, providing higher bandwidth and lower latency for next-generation data center servers [2] - The company completed mass production of the DDR5 fourth generation RCD04 chip, which offers a data transfer rate of up to 7200 MT/s, exceeding the previous generation by over 12.5% [2] Market Position - The company is the only Chinese supplier among the three memory interface chip vendors and is actively involved in the development of JEDEC product standards [3] - The company has reported an order backlog exceeding 140 million yuan for DDR5 second generation MRCD/MDB chips to be delivered in the next six months [3]