Group 1 - The semiconductor industry is entering the GAA (Gate-All-Around) era in 2025, marking a significant shift in technology with the introduction of GAAFET (Gate-All-Around Field Effect Transistor) [1][2] - Samsung has already implemented GAAFET technology in its 3nm chips, while TSMC plans to adopt it in its 2nm chips later this year [2][5] - Following GAA, CFET (Complementary FET) was previously considered the next benchmark architecture, but the introduction of FlipFET technology by Peking University has garnered significant attention [2][28] Group 2 - The semiconductor industry has relied on a formula of shrinking transistor sizes for over fifty years, with FinFET being the leading technology during the 2D transistor era [3][4] - FinFET faced challenges in the 5nm process due to stability and electrostatic issues, leading to the adoption of GAAFET in the 3nm era [5][34] - CFET technology is seen as a strong competitor due to its ability to stack different conductive channel types vertically, allowing for significant area reduction in integrated circuits [6][15] Group 3 - FlipFET technology, introduced at VLSI 2025, has shown a 3.2 times increase in logic density and a 58% reduction in power consumption compared to traditional FinFET [28][29] - FlipFET's design allows for a unique "double-sided active region" and avoids the complex alignment issues faced by CFET, making it a promising alternative [28][30] - The advancements in FlipFET technology indicate a shift in the semiconductor landscape, with potential implications for future chip designs and manufacturing processes [32][33] Group 4 - TSMC plans to achieve 1nm process technology by 2030, with projections of over 1 trillion transistors in chips using 3D packaging technology [33] - Intel aims to start mass production of processors based on its 18A process technology in 2025, which utilizes GAA transistors for improved performance [34] - IBM is seeking a long-term partnership with Japan's Rapidus to develop chips below 1nm, indicating a collaborative approach to advancing semiconductor technology [35]