Core Insights - The storage industry is experiencing a significant upturn due to strong demand from AI data centers and a shortage of HBM, marking a new phase after years of challenges [2][23] - The industry is at a critical technological inflection point, with increasing demand for high-bandwidth, low-power memory across various applications [2][23] - Major DRAM manufacturers are accelerating the development and production of nodes below 10nm, with the competition intensifying as they aim to dominate the market [2][23] Development of 10nm-class Technology - The 10nm-class technology is not a precise measurement but refers to a range of 10-19nm, representing a key step in DRAM manufacturing [3] - The evolution of 10nm-class technology has seen the emergence of three mature production nodes: 1xnm (17-19nm), 1ynm (14-16nm), and 1znm (11-13nm) [3] - Future nodes like 1anm, 1bnm, and 1cnm will continue to optimize within the 10nm-class framework, focusing on density and power reduction [3][5] Challenges in Advancing to 9nm - The 9nm node aims to reduce DRAM feature sizes below 10nm, which could significantly enhance DRAM capacity and lower costs [5][6] - However, challenges include maintaining charge storage stability and managing leakage rates as capacitor sizes shrink [6] - The existing silicon materials and lithography techniques are nearing physical limits, complicating the transition to 9nm [6] Samsung's Strategy - Samsung is aggressively pursuing the 9nm node, incorporating a new 4F² cell structure to overcome limitations faced by the traditional 6F² structure [8][9] - The company plans to develop both 0a (9nm) and 0b (9.8nm) DRAM products, with a target to begin sample delivery by 2027 [11] - Samsung's competitive pressure has led to a more urgent approach in its technology roadmap to regain its leading position in the DRAM market [11] SK Hynix's Approach - SK Hynix is adopting a more conservative strategy, focusing on EUV technology for its next-generation DRAM, with plans to increase EUV layer counts [12][13] - The company is also preparing for the introduction of high numerical aperture (High-NA) EUV technology, which is expected to enhance resolution and manufacturing efficiency [13][20] - SK Hynix's advancements in HBM technology may allow it to debut its 9nm products in the next generation of HBM [14] Micron's Unique Path - Micron is taking a leapfrogging approach, potentially skipping the 8th generation 10nm process and moving directly to the 9nm generation [14][15] - The company is exploring innovative architectures to avoid the costs and time associated with intermediate generations [15][18] - Micron's strategy emphasizes integrated and system-level optimizations, aligning with its goal of transitioning to 3D or stacked solutions [18] High-NA EUV Technology - The surge in orders for ASML's High-NA EUV systems indicates a shift in the semiconductor equipment market, with storage chips gaining a larger share of orders [19][20] - High-NA EUV technology is expected to significantly reduce manufacturing complexity and costs, which is crucial for advancing DRAM processes [19][22] - The transition to High-NA EUV will require comprehensive upgrades across the semiconductor supply chain, presenting both opportunities and challenges [22] Conclusion - The global DRAM industry is at a pivotal moment, with the 9nm node representing a shift from size reduction to architectural upgrades [23] - The competition among major players is not just about technology but also involves strategic investments, customer relationships, and patent positioning [23] - The current market dynamics, driven by AI and data center demands, are fostering a rare dual-driven investment cycle in the storage industry [23][24]