Core Insights - PCIe is the bus standard in servers, with continuous improvements in data transfer rates, expected to reach 256GT/s with the upcoming PCIe 8.0 specification by 2028 [1] - The number of PCIe lanes in server CPUs is increasing, which will drive demand for PCIe slots [2] - The transition to PCIe 6.0 in future server CPUs will create additional demand for PCIe Retimer chips to maintain signal integrity over longer distances [3] Group 1: PCIe Technology Development - PCIe is a high-speed serial computer expansion bus standard used for data exchange between CPUs and other devices, addressing bandwidth limitations of the older PCI standard [1] - The PCIe standard has evolved, with PCIe 5.0 achieving a data transfer rate of 32GT/s and a single lane bandwidth of approximately 4GB/s, allowing for a throughput of 128GB/s in x16 configuration [1] - The PCI-SIG association is developing PCIe 8.0, which is expected to enhance data rates significantly by 2025 [1] Group 2: Server CPU and PCIe Lane Configuration - The configuration of PCIe lanes is crucial for device performance, with common configurations being x1, x4, x8, and x16 [2] - Intel's sixth-generation server CPUs can support up to 88 PCIe 5.0 lanes, a 10% increase from the previous generation, while performance cores can support up to 96 lanes, a 20% increase [2] - As the number of PCIe lanes increases, the demand for PCIe slots is expected to rise correspondingly [2] Group 3: Future Trends and Opportunities - Intel's sixth-generation server CPUs support PCIe 5.0, while AMD's upcoming EPYC "Venice" processors are expected to support PCIe 6.0, anticipated for release in 2026 [3] - The insertion loss budget for PCIe 6.0 is set at 32dB, necessitating the use of PCI Retimer chips to enhance signal quality and extend transmission distances [3] - PCI Retimer chips are essential for addressing issues related to signal integrity and loss in high-speed data transmission environments [3] Group 4: Investment Opportunities - Companies to watch include Hongteng Precision (06088), a PCIe slot supplier, and Lanke Technology (688008.SH, 06809), a supplier of PCIe Retimer chips [4] - Wan Tong Development (600246.SH) is noted for acquiring a PCIe Switch chip supplier, Shudu Technology, indicating strategic moves in the PCIe supply chain [4]

Core Viewpoint - The article discusses the importance of PCIe Retimer technology in enhancing signal integrity and extending transmission distances in high-speed data applications, particularly in data centers and computing systems. Group 1: PCIe Technology Overview - PCIe technology has evolved significantly, with transmission rates increasing from 2.5 GTps in PCIe 1.0 to 64.0 GTps in PCIe 6.0, and PCIe 7.0 expected to reach 128 GT/s by 2025 [7][10]. - The continuous upgrades in PCIe standards have made it a critical component in modern computing platforms [7]. Group 2: Retimer vs Redriver - Retimer technology is a mixed-signal device that can recover and regenerate data signals, improving signal quality compared to Redriver, which simply amplifies signals [12][16]. - Retimer actively participates in the PCIe protocol, while Redriver does not, leading to differences in their capabilities regarding jitter reduction and signal integrity [22][23]. - Retimer can reset the entire jitter budget and provide diagnostic capabilities, whereas Redriver lacks these features and may amplify noise along with the signal [23][27]. Group 3: Market Insights - The PCIe Retimer market is primarily dominated by companies like Astera Labs, which was the first to mass-produce PCIe 5.0 Retimer chips, and 澜起科技, which has launched PCIe 6.0 Retimer chips [36][37]. - The pricing for PCIe 5.0 Retimer chips is estimated at approximately $36 for X8 and $54 for X16 channels, with market potential calculated based on various server configurations [34][32]. - The ratio of GPUs to Retimers in high-performance servers varies, with examples including a 1:1 ratio in DGX A100 servers and a 1:3 ratio in AWS trn2 servers [32][33].