Hello, welcome to a guide to Custom Hardware Development using dynamic PL reload within AMD’s Embedded Development Framework. This How-To video is based on and compatible with the Embedded Common Platform Configurable Example Design (CED) which is the Vivado design used to create the EDF BSP’s, the EDF pre-built OSPI firmware and EDF Linux Disk images. The video will begin by accessing and compiling an EDF compatible Vivado base project targeting the VEK385 board. This base design can be found in the AMD ha ...

Overview of AMD Power Design Manager (PDM) - AMD Power Design Manager (PDM) is used for AMD Spartan™ UltraScale+™ FPGAs [1] - The video guides engineers on how to streamline power analysis and design with Spartan UltraScale+ devices [1] Key Features and Enhancements - PDM improves packaging and power planning compared to traditional tools like XPE [1] - PDM helps to estimate device power requirements [1] Integration and Data Exchange - PDM can be integrated through the AMD Unified Installer [1] - PDM can exchange data with AMD Vivado™ design suite and XPE [1]

Welcome to part two of the Modular NoCs series. In this video, you are going to learn about how to add XPMs into your design to utilize the modular NoC. To refresh your memory, the modular NoC solution is comprised of three main steps.Step one is to connect all AXI busses that want to utilize the NoC to Xilinx parameterizable macros or XPMs. . The second step of the process is to add constraint files (or XDCs) to the design that define connectivity and quality of service parameters for each individual NoC c ...