Core Insights - SK Hynix has unveiled its next-generation DRAM technology roadmap at the IEEE VLSI Symposium 2025, aiming to lead the company for the next 30 years [1][2] - The CTO emphasized the limitations of traditional technology platforms and the need for innovation in structure, materials, and components to overcome performance and capacity bottlenecks [1][2] Group 1: Next-Generation DRAM Technology - The 4F² VG platform minimizes DRAM cell area, achieving high density, speed, and low power consumption compared to traditional DRAM, which has a cell area of 6F [2] - The VG structure features a vertical gate, enhancing integration compared to the traditional horizontal gate structure [2] - 3D DRAM, which stacks memory cells vertically, is also a core direction for next-generation DRAM technology, with plans to overcome cost challenges through innovation [2] Group 2: Future Development and Collaboration - The CTO highlighted the importance of providing a mid- to long-term innovation roadmap for young engineers involved in future DRAM development [3] - SK Hynix aims to collaborate with the industry to realize the future of DRAM technology [3] - The company is also upgrading key materials and components to secure new growth momentum for the continuous evolution of DRAM technology over the next 30 years [2]

如果您希望可以时常见面，欢迎标星收藏哦~ 近日，初创公司NEO 半导体公司再次宣布一项有望彻底改变 DRAM 内存现状的新技：两种 新的 3D X-DRAM 单元设计——1T1C 和 3T0C。据介绍，这两类设计将于 2026 年投入概念 验证测试芯片，而基于公司现有的 3D X-DRAM 技术，能在新单元的单个模块上容纳 512 Gb（64 GB）；这比目前市售的任何模块多 10 倍。NEO 的测试模拟测得 10 纳秒的读/写速 度和超过 9 分钟的保留时间，这两项性能也处于当前 DRAM 能力的前沿。 NEO指出，之所以会推出这些方案，是因为公司看到了DRAM瓶颈。据他们所说，由于10纳米技 术节点以下电容器尺寸缩小的挑战，DRAM的微缩已遭遇关键瓶颈。尽管目前开发可行的DRAM 3D工艺极其复杂，但这仍然迫切需要单片3D DRAM阵列。这正是他们推出新产品和技术的原因。 NEO指出，新推出的3D X-DRAM 1T1C 和 3T0C是一种变革性解决方案，旨在为最苛刻的数据应 用提供前所未有的密度、功率效率和可扩展性。 1T1C和3T0C，完全解读 具体而言，新的 1T1C 单元集成了一个电容器和一个晶体 ...