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台积电3nm,暂停接单?
半导体芯闻· 2026-01-08 10:36
如果您希望可以时常见面,欢迎标星收藏哦~ 晶圆代工龙头台积电先进制程维持高产能利用率,其中3纳米制程持续供不应求。芯片业者透露, 台积电今年除调高3纳米报价外,已暂时停止3纳米新案Kick-off(启动)。半导体业者分析,主因 在于订单满载、现有产能已难以负荷,短期内扩产速度亦难以追上客户需求涌入。 半导体业者透露,GAAFET制程将晶圆制造由平面雕刻升级为立体建构,制程难度呈倍数提升, 至少须克服硅/锗交替叠层外延成长、高深宽比蚀刻,以及原子级ALD闸极包覆等关键难关;其 中,ALD需在悬空结构四周形成均匀、无缺陷的高介电层与金属闸极,对沉积一致性提出近乎极 限的要求。 (来源 : 工商时报 ) 点这里加关注,锁定更多原创内容 *免责声明:文章内容系作者个人观点,半导体芯闻转载仅为了传达一种不同的观点,不代表半导体芯闻对该 观点赞同或支持,如果有任何异议,欢迎联系我们。 推荐阅读 10万亿,投向半导体 芯片巨头,市值大跌 黄仁勋:HBM是个技术奇迹 Jim Keller:RISC-V一定会胜出 喜欢我们的内容就点 "在看 " 分享给小伙伴哦~ 业界进一步指出,台积电此举亦带有策略性考量,借此引导客户将新产品 ...
ASML 看旺半导体 全球产值2030年突破1万亿美元 家登、家硕等沾光
Jing Ji Ri Bao· 2025-11-19 23:47
Core Viewpoint - ASML is optimistic about the semiconductor industry's growth driven by artificial intelligence (AI), predicting global semiconductor sales will exceed $1 trillion by 2030, with ongoing opportunities in equipment sales [1][2] Group 1: Semiconductor Market Outlook - The global semiconductor sales value is expected to surpass $1 trillion by 2030, driven by AI [1] - AI will enhance both advanced and mature process demands in the semiconductor sector, with a significant reliance on sensors that depend on mature processes [1] Group 2: ASML's Product Development - ASML has introduced new equipment targeting the backend packaging application field, with initial shipments occurring in Q3 of this year to meet customer demand [1] - The company is expanding its product line and applications, with related stocks such as Nanya Technology and GlobalWafers expected to benefit [1] Group 3: High NA EUV Technology - ASML's High NA EUV equipment has been successfully demonstrated by major clients like Intel, IBM, and Samsung, with over 350,000 chips exposed using this technology [2] - The High NA EUV equipment offers higher imaging quality and simplified processes, helping clients save time and costs [1][2] Group 4: Industry Trends and Innovations - AI is seen as a key driver for accelerating innovation in semiconductor design and manufacturing technologies, addressing challenges in computing power and energy consumption [2] - Major chip manufacturers are pursuing various paths for process miniaturization, including 2D scaling, new transistor architecture designs, and 3D packaging integration [2] - ASML emphasizes a holistic lithography product portfolio to support industry trends, which is crucial for 3D integration and significantly improves wafer-to-wafer bonding precision [2]